Asaf Badouh 7feb9eaba0 [X86][AVX512] add reduce/range/scalef/rndScale ... include encoding and intrinsics Differential Revision: http://reviews.llvm.org/D11222 llvm-svn: 242896		2015-07-22 12:00:43 +00:00
..
AArch64	AArch64: Add aditional Cyclone macroop fusion opportunities	2015-07-20 22:34:47 +00:00
AMDGPU	AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops	2015-07-20 14:28:41 +00:00
ARM	[ARM] Define subtarget feature "reserve-r9", which is used to decide	2015-07-21 01:42:02 +00:00
BPF	[bpf] rename triple names bpf_be -> bpfeb	2015-06-05 16:11:14 +00:00
CPP
Generic	Targets: commonize some stack realignment code	2015-07-20 22:51:32 +00:00
Hexagon	[Hexagon] Generate MUX from conditional transfers when dot-new not possible	2015-07-20 21:23:25 +00:00
Inputs	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
Mips	[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)	2015-07-15 08:39:35 +00:00
MIR	MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.	2015-07-21 22:28:27 +00:00
MSP430
NVPTX	[BranchFolding] do not iterate the aliases of virtual registers	2015-07-22 04:16:52 +00:00
PowerPC	[PPC64LE] More vector swap optimization TLC	2015-07-21 21:40:17 +00:00
SPARC	[SPARC] Cleanup handling of the Y/ASR registers.	2015-07-08 16:25:12 +00:00
SystemZ	[DAGCombiner] Account for getVectorIdxTy() when narrowing vector load	2015-05-05 19:34:10 +00:00
Thumb	[ARM] Refactor the prologue/epilogue emission to be more robust.	2015-07-20 21:42:14 +00:00
Thumb2	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
WebAssembly	[WebAssembly] Create a CodeGen unittest directory.	2015-07-06 23:14:57 +00:00
WinEH	[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name	2015-07-13 17:55:14 +00:00
X86	[X86][AVX512] add reduce/range/scalef/rndScale	2015-07-22 12:00:43 +00:00
XCore	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00