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14957cb237
HexagonGenMux would collapse pairs of predicated transfers if it assumed that the predicated .new forms cannot be created. Turns out that generating mux is preferable in almost all cases. Introduce an option -hexagon-gen-mux-threshold that controls the minimum distance between the instruction defining the predicate and the later of the two transfers. If the distance is closer than the threshold, mux will not be generated. Set the threshold to 0 by default. llvm-svn: 328346
116 lines
2.7 KiB
LLVM
116 lines
2.7 KiB
LLVM
; RUN: llc -march=hexagon -hexagon-gen-mux-threshold=4 < %s | FileCheck %s
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; Generate various cmpb instruction followed by if (p0) .. if (!p0)...
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target triple = "hexagon"
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define i32 @Func_3Ugt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ugt i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3Uge(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp uge i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3Ult(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ult i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3Ule(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ule i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3Ueq(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp eq i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3Une(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ne i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3UneC(i32 %Enum_Par_Val) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ne i32 %Enum_Par_Val, 122
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3gt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp sgt i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3ge(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp sge i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3lt(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp slt i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3le(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp sle i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3eq(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp eq i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3ne(i32 %Enum_Par_Val, i32 %pv2) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ne i32 %Enum_Par_Val, %pv2
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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define i32 @Func_3neC(i32 %Enum_Par_Val) nounwind readnone {
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entry:
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; CHECK-NOT: mux
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%cmp = icmp ne i32 %Enum_Par_Val, 122
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%selv = zext i1 %cmp to i32
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ret i32 %selv
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}
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