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db3c93e416
This will remove suboptimal branching from the generated ll/sc loops. The extra simplification pass affects a lot of testcases, which have been modified to accommodate this change: either by modifying the test to become immune to the CFG simplification, or (less preferablt) by adding option -hexagon-initial-cfg-clenaup=0. llvm-svn: 338774
46 lines
1.5 KiB
LLVM
46 lines
1.5 KiB
LLVM
; RUN: llc -march=hexagon -verify-machineinstrs -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
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; REQUIRES: asserts
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; Check for some output (as opposed to a crash).
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; CHECK: loop0
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target triple = "hexagon"
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@x = external local_unnamed_addr global [80 x i32], align 8
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; Function Attrs: nounwind
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define void @fred() local_unnamed_addr #0 {
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b0:
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br label %b1
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b1: ; preds = %b20, %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v3 = phi i32 [ 0, %b1 ], [ %v17, %b2 ]
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%v4 = phi i32 [ 0, %b1 ], [ %v16, %b2 ]
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%v5 = phi i32 [ undef, %b1 ], [ %v18, %b2 ]
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%v6 = load i32, i32* undef, align 8
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%v7 = icmp sgt i32 %v6, undef
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%v8 = select i1 %v7, i32 %v3, i32 %v4
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%v9 = select i1 undef, i32 0, i32 %v8
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%v10 = select i1 undef, i32 undef, i32 %v9
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%v11 = select i1 undef, i32 0, i32 %v10
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%v12 = icmp sgt i32 undef, 0
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%v13 = select i1 %v12, i32 undef, i32 %v11
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%v14 = select i1 false, i32 undef, i32 %v13
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%v15 = select i1 false, i32 undef, i32 %v14
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%v16 = select i1 false, i32 undef, i32 %v15
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%v17 = add nsw i32 %v3, 8
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%v18 = add i32 %v5, -8
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%v19 = icmp eq i32 %v18, 0
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br i1 %v19, label %b20, label %b2
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b20: ; preds = %b2
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%v21 = getelementptr inbounds [80 x i32], [80 x i32]* @x, i32 0, i32 %v16
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store i32 -2000, i32* %v21, align 4
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br label %b1
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" "target-features"="-hvx,-long-calls" }
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