Tim Northover 85149ea9e5 AArch64: don't be too greedy when folding :lo12: accesses into mem ops. ... This frequently leads to cases like: ldr xD, [xN, :lo12:var] add xA, xN, :lo12:var ldr xD, [xA, #8] where the ADD would have been needed anyway, and the two distinct addressing modes can prevent the formation of an ldp. Because of how we handle ADRP (aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also results in duplicated ADRP instructions (one on its own to cover the ldr, and one combined with the add). llvm-svn: 223172		2014-12-02 23:13:39 +00:00
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AArch64	AArch64: don't be too greedy when folding :lo12: accesses into mem ops.	2014-12-02 23:13:39 +00:00
ARM	Emit Tag_ABI_FP_denormal correctly in fast-math mode.	2014-12-02 08:22:29 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips] Fix passing of small structures for big-endian O32.	2014-12-02 20:40:27 +00:00
MSP430
NVPTX	[NVPTX] Do not emit .weak symbols for NVPTX	2014-12-01 21:16:17 +00:00
PowerPC	[PowerPC] Implement readcyclecounter for PPC32	2014-12-02 22:01:00 +00:00
R600	R600/SI: Move more information into SIProgramInfo struct	2014-12-02 21:28:53 +00:00
SPARC
SystemZ
Thumb	[Thumb1] Re-write emitThumbRegPlusImmediate	2014-11-17 11:18:10 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets	2014-12-02 22:31:23 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00