mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
55 lines
1.3 KiB
YAML
55 lines
1.3 KiB
YAML
# This file tests the scenario: ISEL R0, RX, R0, CR (X != 0)
|
|
# RUN: llc -ppc-gen-isel=false -run-pass ppc-expand-isel -o - %s | FileCheck %s
|
|
|
|
--- |
|
|
target datalayout = "E-m:e-i64:64-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
define signext i32 @testExpandISEL(i32 signext %i, i32 signext %j) {
|
|
entry:
|
|
%cmp = icmp sgt i32 %i, 0
|
|
%add = add nsw i32 %i, 1
|
|
%cond = select i1 %cmp, i32 %add, i32 %j
|
|
ret i32 %cond
|
|
}
|
|
|
|
...
|
|
---
|
|
name: testExpandISEL
|
|
alignment: 2
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$x0' }
|
|
- { reg: '$x3' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $x0, $x3
|
|
|
|
$r5 = ADDI $r3, 1
|
|
$cr0 = CMPWI $r3, 0
|
|
$r0 = ISEL $r5, $r0, $cr0gt
|
|
; CHECK: BC $cr0gt, %[[TRUE:bb.[0-9]+]]
|
|
; CHECK: B %[[SUCCESSOR:bb.[0-9]+]]
|
|
; CHECK: [[TRUE]]
|
|
; CHECK: $r0 = ADDI $r5, 0
|
|
$x3 = EXTSW_32_64 $r0
|
|
|
|
...
|