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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
37 lines
595 B
YAML
37 lines
595 B
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses immediate machine operands.
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--- |
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define i32 @foo() {
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entry:
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ret i32 42
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}
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define i32 @bar() {
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entry:
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ret i32 -11
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}
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...
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---
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# CHECK: name: foo
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name: foo
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body: |
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bb.0.entry:
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; CHECK: $eax = MOV32ri 42
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; CHECK-NEXT: RETQ $eax
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$eax = MOV32ri 42
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RETQ $eax
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...
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---
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# CHECK: name: bar
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name: bar
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body: |
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bb.0.entry:
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; CHECK: $eax = MOV32ri -11
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; CHECK-NEXT: RETQ $eax
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$eax = MOV32ri -11
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RETQ $eax
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...
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