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llvm-mirror/test/MC/ARM/directive-arch-armv6k.s
Renato Golin 28aa28bb7e [ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM
side of the changes.

ARMV6 family LLVM implementation.

+-------------------------------------+
| ARMV6                               |
+----------------+--------------------+
| ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors
+----------------+--------------------+    have support for hint instructions
| ARMV6T2 (arm,thumb,thumb2)          |    (SEV/WFE/WFI/NOP/YIELD). They can
+-------------------------------------+    be either real or default to NOP.
| ARMV7 (arm,thumb,thumb2)            |    The two processors also use
+-------------------------------------+    different encoding for them.

Patch by Vinicius Tinti.

llvm-svn: 232468
2015-03-17 11:55:28 +00:00

35 lines
955 B
ArmAsm

@ Test the .arch directive for armv6k
@ This test case will check the default .ARM.attributes value for the
@ armv6k architecture.
@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6k
@ CHECK-ASM: .arch armv6k
@ CHECK-ATTR: FileAttributes {
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_name
@ CHECK-ATTR: Value: 6K
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch
@ CHECK-ATTR: Description: ARM v6K
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-1
@ CHECK-ATTR: }
@ CHECK-ATTR: }