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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
46 lines
1.0 KiB
YAML
46 lines
1.0 KiB
YAML
# RUN: llc -march=hexagon -run-pass hexagon-cext-opt %s -o - | FileCheck %s
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# An incorrect assertion was triggered on this code, while attempting to
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# perform a valid transformation.
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# CHECK: PS_jmpret
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--- |
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define void @fred() { ret void }
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@array = global [1024 x i8] zeroinitializer, align 8
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...
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---
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name: fred
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tracksRegLiveness: true
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registers:
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- { id: 0, class: intregs }
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- { id: 1, class: intregs }
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- { id: 2, class: intregs }
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- { id: 3, class: predregs }
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- { id: 4, class: intregs }
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- { id: 5, class: intregs }
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- { id: 6, class: intregs }
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- { id: 7, class: intregs }
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- { id: 8, class: intregs }
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- { id: 9, class: intregs }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0 = COPY $r1
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%1 = COPY $r0
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%2 = A2_tfrsi @array
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%3 = IMPLICIT_DEF
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%4 = A2_tfrsi @array+424
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%5 = M2_macsip %0, %1, 5
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%6 = A2_addi %2, 704
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%7 = A2_tfrsi 0
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S4_pstorerif_rr %3, %6, %5, 2, %7
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%8 = A2_tfrsi @array+144
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%9 = C2_mux %3, %4, %8
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S4_storeiri_io %9, 0, 0
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PS_jmpret $r31, implicit-def $pc
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...
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