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https://github.com/RPCS3/llvm-mirror.git
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66abdd815e
llvm-svn: 327271
67 lines
2.2 KiB
LLVM
67 lines
2.2 KiB
LLVM
; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
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; In DAG combiner, eliminate a store in cases where the store is fed by a
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; load from the same location. This is already done in cases where the store's
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; chain reaches the "output chain" of the load, this tests for cases where
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; the load's "input chain" is reached via an intervening node (eg. TokenFactor)
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; that ensures ordering.
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target triple = "hexagon"
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%s.0 = type { [3 x i32] }
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; Function Attrs: nounwind
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define void @f0(i32 %a0, i32 %a1, %s.0* nocapture %a2, %s.0* nocapture %a3) #0 {
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b0:
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; Pick one store that happens as a result. This isn't the best, but a regular
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; expression for a register name matches some unrelated load.
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; CHECK: %bb.
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; CHECK: = memw(r3+#8)
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; CHECK-NOT: memw(r3+#8) =
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; CHECK: %bb.
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%v0 = bitcast %s.0* %a2 to i8*
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%v1 = bitcast %s.0* %a3 to i8*
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %v0, i8* align 4 %v1, i32 12, i1 false)
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%v2 = bitcast %s.0* %a2 to i96*
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%v3 = zext i32 %a0 to i96
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%v4 = load i96, i96* %v2, align 4
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%v5 = shl nuw nsw i96 %v3, 48
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%v6 = and i96 %v5, 281474976710656
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%v7 = and i96 %v4, -281474976710657
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%v8 = or i96 %v7, %v6
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store i96 %v8, i96* %v2, align 4
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%v9 = icmp eq i32 %a1, 2147483647
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br i1 %v9, label %b1, label %b2
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b1: ; preds = %b0
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%v10 = and i96 %v8, -12582913
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br label %b3
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b2: ; preds = %b0
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%v11 = bitcast %s.0* %a3 to i96*
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%v12 = load i96, i96* %v11, align 4
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%v13 = trunc i96 %v12 to i32
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%v14 = add i32 %v13, %a1
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%v15 = zext i32 %v14 to i96
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%v16 = and i96 %v15, 4194303
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%v17 = and i96 %v8, -4194304
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%v18 = or i96 %v16, %v17
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store i96 %v18, i96* %v2, align 4
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%v19 = load i96, i96* %v11, align 4
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%v20 = and i96 %v19, 12582912
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%v21 = and i96 %v18, -12582913
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%v22 = or i96 %v21, %v20
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br label %b3
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b3: ; preds = %b2, %b1
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%v23 = phi i96 [ %v22, %b2 ], [ %v10, %b1 ]
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store i96 %v23, i96* %v2, align 4
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1) #1
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attributes #0 = { nounwind }
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attributes #1 = { argmemonly nounwind }
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