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92 lines
2.6 KiB
LLVM
92 lines
2.6 KiB
LLVM
; RUN: llc -march=hexagon -no-phi-elim-live-out-early-exit < %s | FileCheck %s
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; Check that we remove the compare and induction variable instructions
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; after generating hardware loops.
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; Bug 6685.
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; CHECK-LABEL: f0:
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; CHECK: loop0
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; CHECK-NOT: r{{[0-9]+}} = add(r{{[0-9]+}},#-1)
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; CHECK-NOT: cmp.eq
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; CHECK: endloop0
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define i32 @f0(i32* nocapture %a0, i32 %a1) #0 {
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b0:
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%v0 = icmp sgt i32 %a1, 0
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br i1 %v0, label %b1, label %b4
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v1 = phi i32 [ %v5, %b2 ], [ 0, %b1 ]
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%v2 = phi i32* [ %v8, %b2 ], [ %a0, %b1 ]
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%v3 = phi i32 [ %v6, %b2 ], [ 0, %b1 ]
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%v4 = load i32, i32* %v2, align 4
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%v5 = add nsw i32 %v4, %v1
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%v6 = add nsw i32 %v3, 1
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%v7 = icmp eq i32 %v6, %a1
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%v8 = getelementptr i32, i32* %v2, i32 1
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br i1 %v7, label %b3, label %b2
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b3: ; preds = %b2
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br label %b4
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b4: ; preds = %b3, %b0
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%v9 = phi i32 [ 0, %b0 ], [ %v5, %b3 ]
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ret i32 %v9
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}
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; This test checks that that initial loop count value is removed.
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; CHECK-LABEL: f1:
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; CHECK-NOT: ={{.}}#40
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; CHECK: loop0
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; CHECK-NOT: r{{[0-9]+}} = add(r{{[0-9]+}},#-1)
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; CHECK-NOT: cmp.eq
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; CHECK: endloop0
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define i32 @f1(i32* nocapture %a0) #0 {
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b0:
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br label %b1
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ 0, %b0 ], [ %v4, %b1 ]
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%v1 = phi i32* [ %a0, %b0 ], [ %v7, %b1 ]
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%v2 = phi i32 [ 0, %b0 ], [ %v5, %b1 ]
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%v3 = load i32, i32* %v1, align 4
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%v4 = add nsw i32 %v3, %v0
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%v5 = add nsw i32 %v2, 1
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%v6 = icmp eq i32 %v5, 40
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%v7 = getelementptr i32, i32* %v1, i32 1
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br i1 %v6, label %b2, label %b1
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b2: ; preds = %b1
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ret i32 %v4
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}
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; This test checks that we don't remove the induction variable since it's used.
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; CHECK-LABEL: f2:
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; CHECK: loop0
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; CHECK: r{{[0-9]+}} = add(r{{[0-9]+}},#1)
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; CHECK-NOT: cmp.eq
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; CHECK: endloop0
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define i32 @f2(i32* nocapture %a0) #1 {
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b0:
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br label %b1
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b1: ; preds = %b1, %b0
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%v0 = phi i32* [ %a0, %b0 ], [ %v4, %b1 ]
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%v1 = phi i32 [ 0, %b0 ], [ %v2, %b1 ]
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store i32 %v1, i32* %v0, align 4
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%v2 = add nsw i32 %v1, 1
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%v3 = icmp eq i32 %v2, 40
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%v4 = getelementptr i32, i32* %v0, i32 1
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br i1 %v3, label %b2, label %b1
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b2: ; preds = %b1
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ret i32 0
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}
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attributes #0 = { nounwind readonly "target-cpu"="hexagonv5" }
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attributes #1 = { nounwind "target-cpu"="hexagonv5" }
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