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50 lines
1.6 KiB
LLVM
50 lines
1.6 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: r{{[0-9]+}}:{{[0-9]+}} ^= pmpyw(r{{[0-9]+}},r{{[0-9]+}})
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; Function Attrs: nounwind
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define i32 @f0(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {
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b0:
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%v0 = alloca i32, align 4
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%v1 = alloca i32, align 4
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%v2 = alloca i32, align 4
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%v3 = alloca i32, align 4
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%v4 = alloca i64, align 8
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%v5 = alloca i64, align 8
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store i32 %a0, i32* %v0, align 4
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store i32 %a1, i32* %v1, align 4
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store i32 %a2, i32* %v2, align 4
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store i32 %a3, i32* %v3, align 4
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%v6 = load i32, i32* %v0, align 4
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%v7 = load i32, i32* %v1, align 4
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%v8 = call i64 @llvm.hexagon.M4.pmpyw(i32 %v6, i32 %v7)
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store i64 %v8, i64* %v5, align 8
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%v9 = load i64, i64* %v5, align 8
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store i64 %v9, i64* %v4, align 8
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%v10 = load i64, i64* %v5, align 8
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%v11 = load i32, i32* %v3, align 4
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%v12 = load i64, i64* %v5, align 8
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%v13 = lshr i64 %v12, 32
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%v14 = trunc i64 %v13 to i32
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%v15 = call i64 @llvm.hexagon.M4.pmpyw.acc(i64 %v10, i32 %v11, i32 %v14)
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store i64 %v15, i64* %v5, align 8
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%v16 = load i64, i64* %v4, align 8
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%v17 = load i64, i64* %v5, align 8
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%v18 = lshr i64 %v17, 32
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%v19 = trunc i64 %v18 to i32
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%v20 = load i32, i32* %v2, align 4
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%v21 = call i64 @llvm.hexagon.M4.pmpyw.acc(i64 %v16, i32 %v19, i32 %v20)
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store i64 %v21, i64* %v4, align 8
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%v22 = load i64, i64* %v4, align 8
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%v23 = trunc i64 %v22 to i32
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ret i32 %v23
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.M4.pmpyw(i32, i32) #1
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.M4.pmpyw.acc(i64, i32, i32) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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