Hrvoje Varga 52c95ef5b8 [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions ... Differential Revision: http://reviews.llvm.org/D16625 llvm-svn: 273850		2016-06-27 08:23:28 +00:00
..
invalid-mips2-wrong-error.s	[mips] Range check simm16	2016-03-31 14:34:00 +00:00
invalid-mips2.s	[mips] Add support for COP1's Branch-On-Cond-Likely instructions	2014-10-17 14:08:28 +00:00
invalid-mips3-wrong-error.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips3.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips4-wrong-error.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips4.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips5-wrong-error.s	[mips] Improve the error messages given by MipsAsmParser.	2014-09-16 15:00:52 +00:00
invalid-mips5.s
invalid-mips32.s
invalid-mips32r2.s	[mips] Marked the DI/EI instruction aliases as MIPS32r2	2014-10-16 15:23:52 +00:00
valid-xfail.s
valid.s	[mips] Weaken asm predicate for memory offsets	2016-05-27 13:56:36 +00:00