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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen
2020-02-20 13:54:43 +00:00
..
AArch64 Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
AMDGPU [AMDGPU] simplifyI24 - replace GetDemandedBits with SimplifyMultipleUseDemandedBits 2020-02-20 12:03:08 +00:00
ARC
ARM Regenerate rotate test. NFC. 2020-02-20 13:54:43 +00:00
AVR
BPF
Generic
Hexagon [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
Inputs
Lanai
Mips [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store 2020-02-19 12:02:27 +01:00
MIR Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
MSP430
NVPTX [NVPTX, LSV] Move the LSV optimization pass to later when the graph is cleaner 2020-02-13 12:15:38 -08:00
PowerPC [NFC][PowerPC] Update the test case scalar-equal.ll 2020-02-17 08:34:56 +00:00
RISCV [RISCV] Implement mayBeEmittedAsTailCall for tail call optimization 2020-02-18 23:56:42 +08:00
SPARC
SystemZ [ValueTracking] Improve isKnownNonNaN() to recognize zero splats. 2020-02-19 09:35:36 -08:00
Thumb Use SETNE directly rather than SUB/SETNE 0 for stack guard check 2020-02-18 13:21:26 +00:00
Thumb2 [ARM,MVE] Add vqdmull[b,t]q intrinsic families 2020-02-20 10:51:19 +00:00
VE [VE] TLS codegen 2020-02-18 16:09:12 +01:00
WebAssembly [WebAssembly] Replace all calls with generalized multivalue calls 2020-02-18 15:55:20 -08:00
WinCFGuard
WinEH
X86 Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
XCore