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4ba6a5e05e
If we have s_pack_* instructions, legalize this to G_BUILD_VECTOR_TRUNC from s32 elements. This is closer to how how the s_pack_* instructions really behave. If we don't have s_pack_ instructions, expand this by creating a merge to s32 and bitcasting. This expands to the expected bit operations. I think this eventually should go in a new bitcast legalize action type in LegalizerHelper. We already directly emit the shift operations in RegBankSelect for the vector case. This could possibly be cleaned up, but I also may want to defer doing this expansion to selection anyway. I'll see about that when I try to actually match VOP3P instructions. This breaks the selection of the build_vector since tablegen doesn't know how to match G_BUILD_VECTOR_TRUNC yet, so just xfail it for now.
211 lines
7.6 KiB
YAML
211 lines
7.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: cttz_zero_undef_s32_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: cttz_zero_undef_s32_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[COPY]](s32)
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; CHECK: $vgpr0 = COPY [[CTTZ_ZERO_UNDEF]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0 = COPY %1
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...
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---
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name: cttz_zero_undef_s32_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: cttz_zero_undef_s32_s64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[COPY]](s64)
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; CHECK: $vgpr0 = COPY [[CTTZ_ZERO_UNDEF]](s32)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0 = COPY %1
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...
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---
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name: cttz_zero_undef_s64_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: cttz_zero_undef_s64_s64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[COPY]](s64)
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s64) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: cttz_zero_undef_s16_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: cttz_zero_undef_s16_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[COPY]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
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; CHECK: $vgpr0 = COPY [[AND]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s16) = G_CTTZ_ZERO_UNDEF %0
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%2:_(s32) = G_ZEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: cttz_zero_undef_s16_s16
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: cttz_zero_undef_s16_s16
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[AND]](s32)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; CHECK: $vgpr0 = COPY [[AND1]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s16) = G_TRUNC %0
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%2:_(s16) = G_CTTZ_ZERO_UNDEF %1
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%3:_(s32) = G_ZEXT %2
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$vgpr0 = COPY %3
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...
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---
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name: cttz_zero_undef_v2s32_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: cttz_zero_undef_v2s32_v2s32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
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; CHECK: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[CTTZ_ZERO_UNDEF]](s32), [[CTTZ_ZERO_UNDEF1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(<2 x s32>) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: cttz_zero_undef_v2s32_v2s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK-LABEL: name: cttz_zero_undef_v2s32_v2s64
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV]](s64)
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; CHECK: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[UV1]](s64)
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[CTTZ_ZERO_UNDEF]](s32), [[CTTZ_ZERO_UNDEF1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
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%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(<2 x s32>) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: cttz_zero_undef_v2s16_v2s16
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: cttz_zero_undef_v2s16_v2s16
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[AND]](s32)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]]
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; CHECK: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[AND1]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[CTTZ_ZERO_UNDEF1]](s32)
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; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]]
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; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[COPY4]](s32)
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; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]]
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL]]
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; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = G_CTTZ_ZERO_UNDEF %0
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$vgpr0 = COPY %1
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...
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---
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name: cttz_zero_undef_s7_s7
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: cttz_zero_undef_s7_s7
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[AND]](s32)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; CHECK: $vgpr0 = COPY [[AND1]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s7) = G_TRUNC %0
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%2:_(s7) = G_CTTZ_ZERO_UNDEF %1
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%3:_(s32) = G_ZEXT %2
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$vgpr0 = COPY %3
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...
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---
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name: cttz_zero_undef_s33_s33
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: cttz_zero_undef_s33_s33
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934591
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
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; CHECK: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s32) = G_CTTZ_ZERO_UNDEF [[AND]](s64)
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[CTTZ_ZERO_UNDEF]](s32)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
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; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[ZEXT]](s64)
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; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[C1]](s64)
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
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; CHECK: $vgpr0_vgpr1 = COPY [[COPY4]](s64)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s33) = G_TRUNC %0
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%2:_(s33) = G_CTTZ_ZERO_UNDEF %1
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%3:_(s64) = G_ANYEXT %2
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$vgpr0_vgpr1 = COPY %3
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...
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