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f1c6dbc4d5
Differential Revision: https://reviews.llvm.org/D96906
15 lines
733 B
LLVM
15 lines
733 B
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; Check that write mask is 0xf.
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; GCN-LABEL: {{^}}sample_2d_vectorized_use:
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; GCN: image_sample v[{{[0-9:]+}}], v[{{[0-9:]+}}], s[{{[0-9:]+}}], s[{{[0-9:]+}}] dmask:0xf
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define amdgpu_ps <4 x float> @sample_2d_vectorized_use(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t, <4 x float> %a) {
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main_body:
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%v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
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%r = fadd <4 x float> %v, %a
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ret <4 x float> %r
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}
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declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32)
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