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212 lines
6.1 KiB
YAML
212 lines
6.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-late-branch-lowering -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s
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--- |
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define amdgpu_ps void @early_term_scc0_end_block() {
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ret void
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}
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define amdgpu_ps void @early_term_scc0_next_terminator() {
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ret void
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}
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define amdgpu_ps void @early_term_scc0_in_block() {
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ret void
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}
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define amdgpu_gs void @early_term_scc0_gs() {
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ret void
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}
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define amdgpu_cs void @early_term_scc0_cs() {
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ret void
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}
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...
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---
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name: early_term_scc0_end_block
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0' }
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- { reg: '$sgpr1' }
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body: |
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; GFX10-LABEL: name: early_term_scc0_end_block
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; GFX10: bb.0:
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; GFX10: successors: %bb.1(0x80000000), %bb.2(0x00000000)
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc
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; GFX10: bb.1:
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; GFX10: liveins: $vgpr0
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; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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; GFX10: S_ENDPGM 0
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; GFX10: bb.2:
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; GFX10: $exec_lo = S_MOV_B32 0
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; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
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; GFX10: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0, $sgpr1
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec
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bb.1:
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liveins: $vgpr0
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EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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S_ENDPGM 0
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...
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---
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name: early_term_scc0_next_terminator
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0' }
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- { reg: '$sgpr1' }
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body: |
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; GFX10-LABEL: name: early_term_scc0_next_terminator
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; GFX10: bb.0:
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; GFX10: successors: %bb.2(0x80000000), %bb.3(0x00000000)
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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; GFX10: S_CBRANCH_SCC0 %bb.3, implicit $scc
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; GFX10: S_BRANCH %bb.2
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; GFX10: bb.1:
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; GFX10: successors: %bb.2(0x80000000)
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; GFX10: $vgpr0 = V_MOV_B32_e32 1, implicit $exec
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; GFX10: bb.2:
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; GFX10: liveins: $vgpr0
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; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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; GFX10: S_ENDPGM 0
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; GFX10: bb.3:
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; GFX10: $exec_lo = S_MOV_B32 0
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; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
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; GFX10: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0, $sgpr1
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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liveins: $vgpr0
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EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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S_ENDPGM 0
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...
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---
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name: early_term_scc0_in_block
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0' }
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- { reg: '$sgpr1' }
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body: |
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; GFX10-LABEL: name: early_term_scc0_in_block
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; GFX10: bb.0:
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; GFX10: successors: %bb.3(0x40000000), %bb.2(0x40000000)
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc
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; GFX10: bb.3:
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; GFX10: successors: %bb.1(0x80000000)
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; GFX10: liveins: $vgpr0, $scc
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; GFX10: $vgpr1 = V_MOV_B32_e32 1, implicit $exec
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; GFX10: bb.1:
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; GFX10: liveins: $vgpr0, $vgpr1
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; GFX10: EXP 1, $vgpr1, $vgpr1, $vgpr1, $vgpr1, -1, -1, 15, implicit $exec
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; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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; GFX10: S_ENDPGM 0
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; GFX10: bb.2:
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; GFX10: $exec_lo = S_MOV_B32 0
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; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
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; GFX10: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0, $sgpr1
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec
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$vgpr1 = V_MOV_B32_e32 1, implicit $exec
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bb.1:
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liveins: $vgpr0, $vgpr1
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EXP 1, $vgpr1, $vgpr1, $vgpr1, $vgpr1, -1, -1, 15, implicit $exec
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EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
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S_ENDPGM 0
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...
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---
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name: early_term_scc0_gs
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0' }
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- { reg: '$sgpr1' }
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body: |
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; GFX10-LABEL: name: early_term_scc0_gs
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; GFX10: bb.0:
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; GFX10: successors: %bb.1(0x80000000)
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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; GFX10: bb.1:
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; GFX10: liveins: $vgpr0
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; GFX10: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0, $sgpr1
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec
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bb.1:
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liveins: $vgpr0
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S_ENDPGM 0
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...
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---
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name: early_term_scc0_cs
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0' }
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- { reg: '$sgpr1' }
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body: |
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; GFX10-LABEL: name: early_term_scc0_cs
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; GFX10: bb.0:
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; GFX10: successors: %bb.1(0x80000000), %bb.2(0x00000000)
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc
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; GFX10: bb.1:
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; GFX10: liveins: $vgpr0
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; GFX10: S_ENDPGM 0
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; GFX10: bb.2:
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; GFX10: $exec_lo = S_MOV_B32 0
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; GFX10: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0, $sgpr1
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc
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SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec
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bb.1:
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liveins: $vgpr0
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S_ENDPGM 0
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...
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