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https://github.com/RPCS3/llvm-mirror.git
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6af08589c4
SIRemoveShortExecBranches is an optimisation so fits well in the context of SIPreEmitPeephole. Test changes relate to early termination from kills which have now been lowered prior to considering branches for removal. As these use s_cbranch the execz skips are now retained instead. Currently either behaviour is valid as kill with EXEC=0 is a nop; however, if early termination is used differently in future then the new behaviour is the correct one. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D98917
109 lines
3.1 KiB
YAML
109 lines
3.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-pre-emit-peephole -amdgpu-skip-threshold=10 -verify-machineinstrs %s -o - | FileCheck %s
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# Make sure mandatory skips are not removed around mode defs.
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# FIXME: -amdgpu-skip-threshold seems to be backwards.
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---
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name: need_skip_gpr_idx_mode
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body: |
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; CHECK-LABEL: name: need_skip_gpr_idx_mode
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: S_SET_GPR_IDX_MODE 0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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S_CBRANCH_EXECZ %bb.2, implicit $exec
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bb.1:
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_SET_GPR_IDX_MODE 0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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bb.2:
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S_ENDPGM 0
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...
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---
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name: need_skip_gpr_idx_on
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body: |
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; CHECK-LABEL: name: need_skip_gpr_idx_on
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: S_SET_GPR_IDX_ON $sgpr0, 0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0
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S_CBRANCH_EXECZ %bb.2, implicit $exec
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bb.1:
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liveins: $sgpr0
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_SET_GPR_IDX_ON $sgpr0, 0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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bb.2:
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S_ENDPGM 0
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...
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---
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name: need_skip_gpr_idx_off
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body: |
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; CHECK-LABEL: name: need_skip_gpr_idx_off
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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S_CBRANCH_EXECZ %bb.2, implicit $exec
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bb.1:
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
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bb.2:
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S_ENDPGM 0
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...
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---
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name: need_skip_gpr_idx_idx
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body: |
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; CHECK-LABEL: name: need_skip_gpr_idx_idx
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: S_SET_GPR_IDX_IDX $sgpr0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0
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S_CBRANCH_EXECZ %bb.2, implicit $exec
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bb.1:
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liveins: $sgpr0
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_SET_GPR_IDX_IDX $sgpr0, implicit-def $mode, implicit-def $m0, implicit $mode, implicit $m0
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bb.2:
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S_ENDPGM 0
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...
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