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f4093e4216
Spilling SGPRs to scratch uses a temporary VGPR. LLVM currently cannot determine if a VGPR is used in other lanes or not, so we need to save all lanes of the VGPR. We even need to save the VGPR if it is marked as dead. The generated code depends on two things: - Can we scavenge an SGPR to save EXEC? - And can we scavenge a VGPR? If we can scavenge an SGPR, we - save EXEC into the SGPR - set the needed lane mask - save the temporary VGPR - write the spilled SGPR into VGPR lanes - save the VGPR again to the target stack slot - restore the VGPR - restore EXEC If we were not able to scavenge an SGPR, we do the same operations, but everytime the temporary VGPR is written to memory, we - write VGPR to memory - flip exec (s_not exec, exec) - write VGPR again (previously inactive lanes) Surprisingly often, we are able to scavenge an SGPR, even though we are at the brink of running out of SGPRs. Scavenging a VGPR does not have a great effect (saves three instructions if no SGPR was scavenged), but we need to know if the VGPR we use is live before or not, otherwise the machine verifier complains. Differential Revision: https://reviews.llvm.org/D96336
71 lines
3.1 KiB
LLVM
71 lines
3.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=SGPR %s
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; Make sure this doesn't crash.
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; ALL-LABEL: {{^}}test:
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; ALL: s_mov_b32 s[[LO:[0-9]+]], SCRATCH_RSRC_DWORD0
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; ALL: s_mov_b32 s[[HI:[0-9]+]], 0xe80000
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; Make sure we are handling hazards correctly.
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; SGPR: buffer_load_dword [[VHI:v[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], 0 offset:4
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; SGPR-NEXT: s_waitcnt vmcnt(0)
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; SGPR-NEXT: v_readlane_b32 s{{[0-9]+}}, [[VHI]], 0
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; SGPR-NEXT: v_readlane_b32 s{{[0-9]+}}, [[VHI]], 1
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; SGPR-NEXT: v_readlane_b32 s{{[0-9]+}}, [[VHI]], 2
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; SGPR-NEXT: v_readlane_b32 s[[HI:[0-9]+]], [[VHI]], 3
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; SGPR-NEXT: buffer_load_dword [[VHI]], off, s[96:99], 0
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; SGPR-NEXT: s_waitcnt vmcnt(0)
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; SGPR-NEXT: s_mov_b64 exec, s[4:5]
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; SGPR-NEXT: s_nop 1
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; SGPR-NEXT: buffer_store_dword v0, off, s[0:3], 0
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; ALL: s_endpgm
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define amdgpu_kernel void @test(i32 addrspace(1)* %out, i32 %in) {
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call void asm sideeffect "", "~{s[0:7]}" ()
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call void asm sideeffect "", "~{s[8:15]}" ()
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call void asm sideeffect "", "~{s[16:23]}" ()
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call void asm sideeffect "", "~{s[24:31]}" ()
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call void asm sideeffect "", "~{s[32:39]}" ()
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call void asm sideeffect "", "~{s[40:47]}" ()
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call void asm sideeffect "", "~{s[48:55]}" ()
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call void asm sideeffect "", "~{s[56:63]}" ()
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call void asm sideeffect "", "~{s[64:71]}" ()
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call void asm sideeffect "", "~{s[72:79]}" ()
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call void asm sideeffect "", "~{s[80:87]}" ()
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call void asm sideeffect "", "~{s[88:95]}" ()
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call void asm sideeffect "", "~{v[0:7]}" ()
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call void asm sideeffect "", "~{v[8:15]}" ()
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call void asm sideeffect "", "~{v[16:23]}" ()
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call void asm sideeffect "", "~{v[24:31]}" ()
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call void asm sideeffect "", "~{v[32:39]}" ()
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call void asm sideeffect "", "~{v[40:47]}" ()
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call void asm sideeffect "", "~{v[48:55]}" ()
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call void asm sideeffect "", "~{v[56:63]}" ()
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call void asm sideeffect "", "~{v[64:71]}" ()
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call void asm sideeffect "", "~{v[72:79]}" ()
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call void asm sideeffect "", "~{v[80:87]}" ()
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call void asm sideeffect "", "~{v[88:95]}" ()
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call void asm sideeffect "", "~{v[96:103]}" ()
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call void asm sideeffect "", "~{v[104:111]}" ()
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call void asm sideeffect "", "~{v[112:119]}" ()
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call void asm sideeffect "", "~{v[120:127]}" ()
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call void asm sideeffect "", "~{v[128:135]}" ()
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call void asm sideeffect "", "~{v[136:143]}" ()
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call void asm sideeffect "", "~{v[144:151]}" ()
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call void asm sideeffect "", "~{v[152:159]}" ()
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call void asm sideeffect "", "~{v[160:167]}" ()
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call void asm sideeffect "", "~{v[168:175]}" ()
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call void asm sideeffect "", "~{v[176:183]}" ()
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call void asm sideeffect "", "~{v[184:191]}" ()
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call void asm sideeffect "", "~{v[192:199]}" ()
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call void asm sideeffect "", "~{v[200:207]}" ()
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call void asm sideeffect "", "~{v[208:215]}" ()
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call void asm sideeffect "", "~{v[216:223]}" ()
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call void asm sideeffect "", "~{v[224:231]}" ()
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call void asm sideeffect "", "~{v[232:239]}" ()
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call void asm sideeffect "", "~{v[240:247]}" ()
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call void asm sideeffect "", "~{v[248:255]}" ()
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store i32 %in, i32 addrspace(1)* %out
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ret void
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}
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