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llvm-mirror/test/CodeGen/RISCV/mir-target-flags.ll
Fangrui Song 556dfb9bf9 [TargetMachine] Don't imply dso_local on function declarations in Reloc::Static model for ELF/wasm
clang/lib/CodeGen/CodeGenModule sets dso_local on applicable function declarations,
we don't need to duplicate the work in TargetMachine:shouldAssumeDSOLocal.
(Actually the long-term goal (started by r324535) is to drop TargetMachine::shouldAssumeDSOLocal.)

By not implying dso_local, we will respect dso_local/dso_preemptable specifiers
set by the frontend. This allows the proposed -fno-direct-access-external-data
option to work with -fno-pic and prevent a canonical PLT entry (SHN_UNDEF with non-zero st_value)
when taking the address of a function symbol.

This patch should be NFC in terms of the Clang emitted assembly because the case
we don't set dso_local is a case Clang sets dso_local. However, some tests don't
set dso_local on some function declarations and expose some differences. Most
tests have been fixed to be more robust in the previous commit.
2020-12-05 14:54:37 -08:00

75 lines
2.9 KiB
LLVM

; RUN: llc -mtriple=riscv32 --code-model=small \
; RUN: -stop-after riscv-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass none %t.mir -o - | \
; RUN: FileCheck %s -check-prefix=RV32-SMALL
;
; RUN: llc -mtriple=riscv32 --code-model=medium --relocation-model=pic \
; RUN: -stop-after riscv-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass none %t.mir -o - | \
; RUN: FileCheck %s -check-prefix=RV32-MED
; This tests the RISC-V-specific serialization and deserialization of
; `target-flags(...)`
@g_e = external global i32
@g_i = internal global i32 0
@t_un = external thread_local global i32
@t_ld = external thread_local(localdynamic) global i32
@t_ie = external thread_local(initialexec) global i32
@t_le = external thread_local(localexec) global i32
declare i32 @callee(i32) nounwind
define i32 @caller(i32 %a) nounwind {
; RV32-SMALL-LABEL: name: caller
; RV32-SMALL: target-flags(riscv-hi) @g_e
; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_e
; RV32-SMALL-NEXT: target-flags(riscv-hi) @g_i
; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_i
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_un
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.1
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ld
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.2
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ie
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.3
; RV32-SMALL: target-flags(riscv-tprel-hi) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_le
; RV32-SMALL: target-flags(riscv-plt) @callee
;
; RV32-MED-LABEL: name: caller
; RV32-MED: target-flags(riscv-got-hi) @g_e
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.1
; RV32-MED: target-flags(riscv-pcrel-hi) @g_i
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.2
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_un
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.3
; RV32-MED-NEXT: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_ld
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.4
; RV32-MED-NEXT: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-got-hi) @t_ie
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.5
; RV32-MED: target-flags(riscv-tprel-hi) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-lo) @t_le
; RV32-MED: target-flags(riscv-plt) @callee
;
%b = load i32, i32* @g_e
%c = load i32, i32* @g_i
%d = load i32, i32* @t_un
%e = load i32, i32* @t_ld
%f = load i32, i32* @t_ie
%g = load i32, i32* @t_le
%sum = bitcast i32 0 to i32
%sum.a = add i32 %sum, %a
%sum.b = add i32 %sum.a, %b
%sum.c = add i32 %sum.b, %c
%sum.d = add i32 %sum.c, %d
%sum.e = add i32 %sum.d, %e
%sum.f = add i32 %sum.e, %f
%sum.g = add i32 %sum.f, %g
%retval = call i32 @callee(i32 %sum.g)
ret i32 %retval
}