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fe277ade36
This is an complementary/alternative fix for D99068. It takes a slightly different approach by explicitly summing up all of the required split part type sizes and ensuring we allocate enough space for them. It also takes the maximum alignment of each part. Compared with D99068 there are fewer changes to the stack objects in existing tests. However, @luismarques has shown in that patch that there are opportunities to reduce our stack usage in the future. Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D99087
139 lines
4.3 KiB
LLVM
139 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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; When passing a function argument with a size that isn't a multiple of XLEN,
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; and the argument is split and passed indirectly, we must ensure that the stack
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; slot size appropriately reflects the total size of the parts the argument is
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; split into. Otherwise, stack writes can clobber neighboring values.
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declare void @callee129(i129)
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declare void @callee160(i160)
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declare void @callee161(i161)
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define i32 @caller129() nounwind {
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; RV32I-LABEL: caller129:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a0, zero, 42
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; RV32I-NEXT: sw a0, 24(sp)
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; RV32I-NEXT: sw zero, 16(sp)
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; RV32I-NEXT: sw zero, 12(sp)
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; RV32I-NEXT: sw zero, 8(sp)
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; RV32I-NEXT: sw zero, 4(sp)
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; RV32I-NEXT: mv a0, sp
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; RV32I-NEXT: sw zero, 0(sp)
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; RV32I-NEXT: call callee129@plt
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; RV32I-NEXT: lw a0, 24(sp)
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; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 32
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: caller129:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a0, zero, 42
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; RV64I-NEXT: sw a0, 36(sp)
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; RV64I-NEXT: sd zero, 16(sp)
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; RV64I-NEXT: sd zero, 8(sp)
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; RV64I-NEXT: mv a0, sp
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; RV64I-NEXT: sd zero, 0(sp)
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; RV64I-NEXT: call callee129@plt
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; RV64I-NEXT: lw a0, 36(sp)
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; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 48
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; RV64I-NEXT: ret
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%1 = alloca i32
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store i32 42, i32* %1
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call void @callee129(i129 0)
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%2 = load i32, i32* %1
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ret i32 %2
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}
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define i32 @caller160() nounwind {
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; RV32I-LABEL: caller160:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a0, zero, 42
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; RV32I-NEXT: sw a0, 24(sp)
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; RV32I-NEXT: sw zero, 16(sp)
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; RV32I-NEXT: sw zero, 12(sp)
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; RV32I-NEXT: sw zero, 8(sp)
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; RV32I-NEXT: sw zero, 4(sp)
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; RV32I-NEXT: mv a0, sp
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; RV32I-NEXT: sw zero, 0(sp)
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; RV32I-NEXT: call callee160@plt
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; RV32I-NEXT: lw a0, 24(sp)
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; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 32
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: caller160:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a0, zero, 42
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; RV64I-NEXT: sw a0, 36(sp)
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; RV64I-NEXT: sd zero, 16(sp)
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; RV64I-NEXT: sd zero, 8(sp)
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; RV64I-NEXT: mv a0, sp
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; RV64I-NEXT: sd zero, 0(sp)
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; RV64I-NEXT: call callee160@plt
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; RV64I-NEXT: lw a0, 36(sp)
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; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 48
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; RV64I-NEXT: ret
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%1 = alloca i32
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store i32 42, i32* %1
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call void @callee160(i160 0)
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%2 = load i32, i32* %1
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ret i32 %2
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}
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define i32 @caller161() nounwind {
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; RV32I-LABEL: caller161:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a0, zero, 42
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; RV32I-NEXT: sw a0, 24(sp)
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; RV32I-NEXT: sw zero, 20(sp)
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; RV32I-NEXT: sw zero, 16(sp)
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; RV32I-NEXT: sw zero, 12(sp)
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; RV32I-NEXT: sw zero, 8(sp)
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; RV32I-NEXT: sw zero, 4(sp)
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; RV32I-NEXT: mv a0, sp
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; RV32I-NEXT: sw zero, 0(sp)
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; RV32I-NEXT: call callee161@plt
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; RV32I-NEXT: lw a0, 24(sp)
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; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 32
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: caller161:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a0, zero, 42
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; RV64I-NEXT: sw a0, 36(sp)
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; RV64I-NEXT: sd zero, 16(sp)
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; RV64I-NEXT: sd zero, 8(sp)
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; RV64I-NEXT: mv a0, sp
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; RV64I-NEXT: sd zero, 0(sp)
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; RV64I-NEXT: call callee161@plt
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; RV64I-NEXT: lw a0, 36(sp)
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; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 48
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; RV64I-NEXT: ret
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%1 = alloca i32
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store i32 42, i32* %1
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call void @callee161(i161 0)
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%2 = load i32, i32* %1
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ret i32 %2
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}
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