Tim Northover 86fa0255b2 AArch64: TableGenerate system instruction operands. ... The way the named arguments for various system instructions are handled at the moment has a few problems: - Large-scale duplication between AArch64BaseInfo.h and AArch64BaseInfo.cpp - That weird Mapping class that I have no idea what I was on when I thought it was a good idea. - Searches are performed linearly through the entire list. - We print absolutely all registers in upper-case, even though some are canonically mixed case (SPSel for example). - The ARM ARM specifies sysregs in terms of 5 fields, but those are relegated to comments in our implementation, with a slightly opaque hex value indicating the canonical encoding LLVM will use. This adds a new TableGen backend to produce efficiently searchable tables, and switches AArch64 over to using that infrastructure. llvm-svn: 274576		2016-07-05 21:23:04 +00:00
..
adrp-relocation.s
alias-addsubimm.s
alias-logicalimm.s
arm64-adr.s
arm64-advsimd.s	add support for -print-imm-hex for AArch64	2016-05-13 18:00:09 +00:00
arm64-aliases.s	AArch64: allow MOV (imm) alias to be printed	2016-06-16 01:42:25 +00:00
arm64-arithmetic-encoding.s	AArch64: allow MOV (imm) alias to be printed	2016-06-16 01:42:25 +00:00
arm64-arm64-fixup.s
arm64-basic-a64-instructions.s
arm64-be-datalayout.s
arm64-bitfield-encoding.s
arm64-branch-encoding.s
arm64-condbr-without-dots.s
arm64-crypto.s
arm64-diagno-predicate.s
arm64-diags.s	[AArch64] Check the size of the vector before accessing its elements.	2015-10-13 18:55:34 +00:00
arm64-directive_loh.s
arm64-elf-reloc-condbr.s
arm64-elf-relocs.s
arm64-fp-encoding-error.s
arm64-fp-encoding.s	[AArch64] Add ARMv8.2-A FP16 scalar instructions	2015-11-27 13:04:48 +00:00
arm64-large-relocs.s
arm64-leaf-compact-unwind.s	[llvm-readobj] MachO -- correctly dump section field 'Reserved3'	2015-09-01 16:29:02 +00:00
arm64-logical-encoding.s
arm64-mapping-across-sections.s
arm64-mapping-within-section.s
arm64-memory.s
arm64-nv-cond.s
arm64-optional-hash.s
arm64-separator.s
arm64-simd-ldst.s
arm64-small-data-fixups.s
arm64-spsel-sysreg.s	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
arm64-system-encoding.s	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
arm64-target-specific-sysreg.s
arm64-tls-modifiers-darwin.s
arm64-tls-relocs.s
arm64-v128_lo-diagnostics.s
arm64-variable-exprs.s
arm64-vector-lists.s
arm64-verbose-vector-case.s
armv8.1a-atomic.s
armv8.1a-lor.s
armv8.1a-pan.s	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
armv8.1a-rdma.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
armv8.1a-vhe.s
armv8.2a-at.s	[AArch64] Add ARMv8.2-A new AT instruction variants	2015-11-26 15:34:44 +00:00
armv8.2a-mmfr2.s	[AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register	2015-11-26 15:26:10 +00:00
armv8.2a-persistent-memory.s	[AArch64] Add ARMv8.2-A persistent memory instruction	2015-11-26 15:28:47 +00:00
armv8.2a-statistical-profiling.s	[AArch64] Add ARMv8.2-A Statistical Profiling Extension	2015-12-01 10:48:51 +00:00
armv8.2a-uao.s	[AArch64] Add ARMv8.2-A UAO PSTATE bit	2015-11-26 15:32:30 +00:00
basic-a64-diagnostics.s	[AArch64] Add ARMv8.2-A FP16 scalar instructions	2015-11-27 13:04:48 +00:00
basic-a64-instructions.s	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
basic-pic.s
case-insen-reg-names.s
cyclone-crc.s	AArch64: remove CRC feature from Cyclone.	2016-02-24 18:10:17 +00:00
directive-arch-negative.s	test: split test into two files	2016-06-10 17:33:28 +00:00
directive-arch.s	test: split test into two files	2016-06-10 17:33:28 +00:00
directive-cpu.s	AArch64: support .cpu directive	2016-04-02 19:29:52 +00:00
dot-req-case-insensitive.s
dot-req-diagnostics.s
dot-req.s
elf_osabi_flags.s	Restore test coverage for other than ELFOSABI_NONE	2015-09-24 23:01:16 +00:00
elf-extern.s
elf-globaladdress.ll
elf-objdump.s
elf-reloc-addsubimm.s
elf-reloc-ldrlit.s
elf-reloc-ldstunsimm.s
elf-reloc-movw.s
elf-reloc-pcreladdressing.s
elf-reloc-tstb.s
elf-reloc-uncondbrimm.s
error-location-ldr-pseudo.s	[ARM,AArch64] Store source location of asm constant pool entries	2015-11-16 16:25:47 +00:00
error-location.s	MCParser: diagnose missing directional labels more clearly.	2016-04-11 19:50:46 +00:00
expr-shr.s
fixup-out-of-range.s	[AArch64] Better errors for out-of-range fixups	2016-04-01 09:14:50 +00:00
fullfp16-diagnostics.s	[AArch64] Fix FP16 vector instructions that should only accept low registers	2015-12-09 14:32:11 +00:00
fullfp16-neon-neg.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
gicv3-regs-diagnostics.s
gicv3-regs.s
inline-asm-modifiers.s
inst-directive-diagnostic.s
inst-directive.s	Followup to 258750; update this test to use .p2align .	2016-01-26 00:17:24 +00:00
jump-table.s
ldr-pseudo-diagnostics.s	[AArch64] ldr= pseudo-instruction silently ignored if register invalid	2015-11-16 10:25:19 +00:00
ldr-pseudo-obj-errors.s	[AArch64] Better errors for out-of-range fixups	2016-04-01 09:14:50 +00:00
ldr-pseudo.s	AArch64: allow MOV (imm) alias to be printed	2016-06-16 01:42:25 +00:00
lit.local.cfg
mapping-across-sections.s
mapping-within-section.s
neon-2velem.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-3vdiff.s
neon-aba-abd.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-across.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-add-pairwise.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-add-sub-instructions.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-bitwise-instructions.s
neon-compare-instructions.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-crypto.s
neon-diagnostics.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-extract.s
neon-facge-facgt.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-frsqrt-frecp.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-halving-add-sub.s
neon-max-min-pairwise.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-max-min.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-mla-mls-instructions.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-mov.s
neon-mul-div-instructions.s
neon-perm.s
neon-rounding-halving-add.s
neon-rounding-shift.s
neon-saturating-add-sub.s
neon-saturating-rounding-shift.s
neon-saturating-shift.s
neon-scalar-abs.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-add-sub.s
neon-scalar-by-elem-mla.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-by-elem-mul.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-by-elem-saturating-mla.s
neon-scalar-by-elem-saturating-mul.s
neon-scalar-compare.s
neon-scalar-cvt.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-dup.s
neon-scalar-extract-narrow.s
neon-scalar-fp-compare.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-mul.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-neg.s
neon-scalar-recip.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-reduce-pairwise.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-scalar-rounding-shift.s
neon-scalar-saturating-add-sub.s
neon-scalar-saturating-rounding-shift.s
neon-scalar-saturating-shift.s
neon-scalar-shift-imm.s
neon-scalar-shift.s
neon-shift-left-long.s
neon-shift.s
neon-simd-copy.s
neon-simd-ldst-multi-elem.s
neon-simd-ldst-one-elem.s
neon-simd-misc.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-simd-post-ldst-multi-elem.s
neon-simd-shift.s	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
neon-sxtl.s
neon-tbl.s
neon-uxtl.s
noneon-diagnostics.s	[AArch64] Improve short-form diags on long-form Match_InvalidOperand.	2015-08-19 17:40:19 +00:00
optional-hash.s	Remove redundant -mattr options from llvm-objdump commands.	2016-06-16 15:47:19 +00:00
ras-extension.s	RAS extensions are part of ARMv8.2-A. This change enables them by introducing a	2016-06-03 14:03:27 +00:00
single-slash.s	AArch64: allow MOV (imm) alias to be printed	2016-06-16 01:42:25 +00:00
tls-relocs.s
trace-regs-diagnostics.s
trace-regs.s