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42dd72a403
General purpose registers 30 and 31 are handled differently when they are reserved as the base-pointer and frame-pointer respectively. This fixes the offset of their fixed-stack objects when there are fpr calle-saved registers. Differential Revision: https://reviews.llvm.org/D85850
28 lines
671 B
LLVM
28 lines
671 B
LLVM
; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
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; RUN: -mtriple=powerpc-ibm-aix-xcoff | \
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; RUN: FileCheck %s -check-prefix=AIX32
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; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
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; RUN: -mtriple=powerpc64-ibm-aix-xcoff | \
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; RUN: FileCheck %s -check-prefixes=AIX64
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declare void @clobber(i32*)
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define dso_local float @frameptr_only(i32 %n, float %f) {
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entry:
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%0 = alloca i32, i32 %n
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call void @clobber(i32* %0)
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ret float %f
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}
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; AIX32: stw 31, -12(1)
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; AIX32: stwu 1, -80(1)
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; AIX32: lwz 1, 0(1)
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; AIX32: lwz 31, -12(1)
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; AIX64: std 31, -16(1)
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; AIX64: stdu 1, -144(1)
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; AIX64: ld 1, 0(1)
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; AIX64: ld 31, -16(1)
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