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llvm-mirror/test/CodeGen/Thumb2/v8_IT_5.ll
Peter Collingbourne 685edd3002 ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.
In particular, this preserves the kill flag, which allows the Thumb2 cbn?z
optimization to be applied in cases where a branch has been re-created after
the live variables analysis pass, e.g. by the machine block placement pass.

This appears to be low risk; a number of other targets seem to already be
doing something similar, e.g. AArch64, PowerPC.

Differential Revision: http://reviews.llvm.org/D9184

llvm-svn: 235639
2015-04-23 20:31:32 +00:00

64 lines
1.3 KiB
LLVM

; RUN: llc < %s -mtriple=thumbv8 -arm-atomic-cfg-tidy=0 | FileCheck %s
; RUN: llc < %s -mtriple=thumbv7 -arm-atomic-cfg-tidy=0 -arm-restrict-it | FileCheck %s
; CHECK: it ne
; CHECK-NEXT: cmpne
; CHECK-NEXT: bne [[JUMPTARGET:.LBB[0-9]+_[0-9]+]]
; CHECK: cbz
; CHECK-NEXT: %if.else163
; CHECK-NEXT: mov.w
; CHECK-NEXT: b
; CHECK-NEXT: %if.else145
; CHECK-NEXT: mov.w
; CHECK: [[JUMPTARGET]]:{{.*}}%if.else173
%struct.hc = type { i32, i32, i32, i32 }
define i32 @t(i32 %type) optsize {
entry:
br i1 undef, label %if.then, label %if.else
if.then:
unreachable
if.else:
br i1 undef, label %if.then15, label %if.else18
if.then15:
unreachable
if.else18:
switch i32 %type, label %if.else173 [
i32 3, label %if.then115
i32 1, label %if.then102
]
if.then102:
br i1 undef, label %cond.true10.i, label %t.exit
cond.true10.i:
br label %t.exit
t.exit:
unreachable
if.then115:
br i1 undef, label %if.else163, label %if.else145
if.else145:
%call150 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34865152) optsize
br label %while.body172
if.else163:
%call168 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34078720) optsize
br label %while.body172
while.body172:
br label %while.body172
if.else173:
ret i32 -1
}
declare hidden fastcc %struct.hc* @foo(%struct.hc* nocapture, i32) nounwind optsize