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llvm-mirror/test/CodeGen/Mips/buildpairf64-extractelementf64-implicit-sp.ll
Matt Arsenault 23c462a8b5 Rename ExpandISelPseudo->FinalizeISel, delay register reservation
This allows targets to make more decisions about reserved registers
after isel. For example, now it should be certain there are calls or
stack objects in the frame or not, which could have been introduced by
legalization.

Patch by Matthias Braun

llvm-svn: 363757
2019-06-19 00:25:39 +00:00

33 lines
1.4 KiB
LLVM

; RUN: llc -o - %s -mtriple=mips-unknown-linux-gnu \
; RUN: -mcpu=mips32 -mattr=+fpxx \
; RUN: -stop-after=finalize-isel | \
; RUN: FileCheck %s -check-prefix=FPXX-IMPLICIT-SP
; RUN: llc -o - %s -mtriple=mips-unknown-linux-gnu \
; RUN: -mcpu=mips32r6 -mattr=+fp64,+nooddspreg \
; RUN: -stop-after=finalize-isel | \
; RUN: FileCheck %s -check-prefix=FP64-IMPLICIT-SP
; RUN: llc -o - %s -mtriple=mips-unknown-linux-gnu \
; RUN: -mcpu=mips32r2 -mattr=+fpxx \
; RUN: -stop-after=finalize-isel | \
; RUN: FileCheck %s -check-prefix=NO-IMPLICIT-SP
define double @foo2(i32 signext %v1, double %d1) {
entry:
; FPXX-IMPLICIT-SP: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}, implicit $sp
; FPXX-IMPLICIT-SP: ExtractElementF64 killed %{{[0-9]+}}, 1, implicit $sp
; FP64-IMPLICIT-SP: BuildPairF64_64 %{{[0-9]+}}, %{{[0-9]+}}, implicit $sp
; FP64-IMPLICIT-SP: ExtractElementF64_64 killed %{{[0-9]+}}, 1, implicit $sp
; NO-IMPLICIT-SP: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}
; NO-IMPLICIT-SP-NOT: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}, implicit $sp
; NO-IMPLICIT-SP: ExtractElementF64 killed %{{[0-9]+}}, 1
; NO-IMPLICIT-SP-NOT: ExtractElementF64 killed %{{[0-9]+}}, 1, implicit $sp
%conv = fptrunc double %d1 to float
%0 = tail call float @llvm.copysign.f32(float 1.000000e+00, float %conv)
%conv1 = fpext float %0 to double
ret double %conv1
}
declare float @llvm.copysign.f32(float, float)