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95037fa9f6
Most of the test changes are trivial instruction reorderings and differing register allocations, without any obvious performance impact. Differential Revision: https://reviews.llvm.org/D66973 llvm-svn: 372106
49 lines
1.6 KiB
LLVM
49 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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@a = global [4096 x i32] zeroinitializer, align 4
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@b = global [4096 x i32] zeroinitializer, align 4
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; This test demonstrates very slightly improved codegen in the case that
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; a correct isLegalAddImmediate is implemented, thanks to LoopStrengthReduce.
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define i32 @main() nounwind {
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; RV32I-LABEL: main:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: mv a0, zero
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; RV32I-NEXT: lui a1, %hi(b)
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; RV32I-NEXT: addi a1, a1, %lo(b)
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; RV32I-NEXT: lui a2, %hi(a)
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; RV32I-NEXT: addi a2, a2, %lo(a)
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; RV32I-NEXT: lui a3, 1
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; RV32I-NEXT: .LBB0_1: # %for.body
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; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
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; RV32I-NEXT: addi a4, a0, -2048
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; RV32I-NEXT: sw a4, 0(a2)
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: addi a0, a0, 1
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; RV32I-NEXT: addi a1, a1, 4
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; RV32I-NEXT: addi a2, a2, 4
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; RV32I-NEXT: bne a0, a3, .LBB0_1
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; RV32I-NEXT: # %bb.2: # %for.end
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; RV32I-NEXT: mv a0, zero
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; RV32I-NEXT: ret
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entry:
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br label %for.body
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for.body:
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%i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%sub = add nsw i32 %i.08, -2048
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%arrayidx = getelementptr inbounds [4096 x i32], [4096 x i32]* @a, i32 0, i32 %i.08
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store i32 %sub, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds [4096 x i32], [4096 x i32]* @b, i32 0, i32 %i.08
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store i32 %i.08, i32* %arrayidx1, align 4
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, 4096
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 0
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}
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