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1bb14916f2
This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM. FastISel is mostly disabled for now since it would generate incorrect code for ILP32. llvm-svn: 371722
43 lines
882 B
LLVM
43 lines
882 B
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64_32-apple-ios7.0 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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define i32 @test_jumptable(i32 %in) {
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; CHECK: test_jumptable
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK: adrp [[JTPAGE:x[0-9]+]], LJTI0_0@PAGE
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; CHECK: mov w[[INDEX:[0-9]+]], w0
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; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], LJTI0_0@PAGEOFF
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; CHECK: adr [[BASE_BLOCK:x[0-9]+]], LBB0_2
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; CHECK: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], x[[INDEX]]]
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; CHECK: add [[DEST:x[0-9]+]], [[BASE_BLOCK]], x[[OFFSET]], lsl #2
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; CHECK: br [[DEST]]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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; CHECK: LJTI0_0:
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; CHECK-NEXT: .byte
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; CHECK-NEXT: .byte
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; CHECK-NEXT: .byte
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; CHECK-NEXT: .byte
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; CHECK-NEXT: .byte
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