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c4ee204f5c
Allocating larger register classes first should give better allocation results (and more importantly for myself, make the lit tests more stable with respect to scheduler changes). Patch by Matthias Braun llvm-svn: 270312
17 lines
691 B
LLVM
17 lines
691 B
LLVM
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=GCN %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=fiji | FileCheck --check-prefix=GCN %s
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; If flat_store_dword and flat_load_dword use different registers for the data
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; operand, this test is not broken. It just means it is no longer testing
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; for the original bug.
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; GCN: {{^}}test:
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; XGCN: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[DATA:v[0-9]+]]
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; XGCN: s_waitcnt vmcnt(0) lgkmcnt(0)
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; XGCN: flat_load_dword [[DATA]], v[{{[0-9]+:[0-9]+}}]
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define void @test(i32 addrspace(1)* %out, i32 %in) {
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store volatile i32 0, i32 addrspace(1)* %out
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%val = load volatile i32, i32 addrspace(1)* %out
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ret void
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}
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