1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
llvm-mirror/test/CodeGen/ARM/2010-04-14-SplitVector.ll
Bob Wilson 7b19d89e3a Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand
does not have a legal type.  The legalizer does not know how to handle those
nodes.  Radar 7854640.

llvm-svn: 101282
2010-04-14 20:45:23 +00:00

17 lines
329 B
LLVM

; RUN: llc < %s -march=arm -mcpu=arm1136jf-s
; Radar 7854640
define arm_apcscc void @test() nounwind {
bb:
br i1 undef, label %bb9, label %bb10
bb9:
%tmp63 = bitcast <4 x float> zeroinitializer to i128
%tmp64 = trunc i128 %tmp63 to i32
br label %bb10
bb10:
%0 = phi i32 [ %tmp64, %bb9 ], [ undef, %bb ]
ret void
}