David Blaikie 938d7fe477 Fix layering of MachineValueType.h by moving it from CodeGen to Support ... This is used by llvm tblgen as well as by LLVM Targets, so the only common place is Support for now. (maybe we need another target for these sorts of things - but for now I'm at least making them correct & we can make them better if/when people have strong feelings) llvm-svn: 328395		2018-03-23 23:58:25 +00:00
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GlobalISel	[GlobalISel][TableGen] Add support for SDNodeXForm	2018-01-16 18:44:05 +00:00
CodeGenCWrappers.h	Fix layering of MachineValueType.h by moving it from CodeGen to Support	2018-03-23 23:58:25 +00:00
GenericOpcodes.td	GlobalISel: IRTranslate llvm.fabs.* intrinsic	2018-03-05 22:31:55 +00:00
Target.td	[X86] Add phony registers for high halves of regs with low halves	2018-03-20 18:46:55 +00:00
TargetCallingConv.td
TargetIntrinsicInfo.h
TargetItinerary.td	[NFC] Fix comment of class InstrStage	2018-02-12 15:02:49 +00:00
TargetLoweringObjectFile.h	Move TargetLoweringObjectFile from CodeGen to Target to fix layering	2018-03-23 23:58:19 +00:00
TargetMachine.h	TargetMachine: Add address space to getPointerSize	2018-03-14 00:36:23 +00:00
TargetOptions.h	[TLS] use emulated TLS if the target supports only this mode	2018-02-28 17:48:55 +00:00
TargetSchedule.td	[TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.	2018-03-18 19:56:15 +00:00
TargetSelectionDAG.td	TableGen: Check the dynamic type of !cast<Rec>(string)	2018-03-19 14:14:20 +00:00