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8a987c4789
If a virtual register is copied and another copy was already seen, replace with the previous copy. This only handles the simplest cases for now. This pattern shows up from various operand restrictions AMDGPU has which require inserting copies depending on the register class of the operands. llvm-svn: 248611
33 lines
1.0 KiB
LLVM
33 lines
1.0 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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; Test that codegenprepare understands address space sizes
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%struct.foo = type { [3 x float], [3 x float] }
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; CHECK-LABEL: {{^}}do_as_ptr_calcs:
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; CHECK: s_load_dword [[SREG1:s[0-9]+]],
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; CHECK: v_mov_b32_e32 [[VREG1:v[0-9]+]], [[SREG1]]
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; CHECK-DAG: ds_read_b32 v{{[0-9]+}}, [[VREG1]] offset:12
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; CHECK-DAG: ds_read_b32 v{{[0-9]+}}, [[VREG1]] offset:20
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define void @do_as_ptr_calcs(%struct.foo addrspace(3)* nocapture %ptr) nounwind {
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entry:
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%x = getelementptr inbounds %struct.foo, %struct.foo addrspace(3)* %ptr, i32 0, i32 1, i32 0
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%y = getelementptr inbounds %struct.foo, %struct.foo addrspace(3)* %ptr, i32 0, i32 1, i32 2
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br label %bb32
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bb32:
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%a = load float, float addrspace(3)* %x, align 4
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%b = load float, float addrspace(3)* %y, align 4
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%cmp = fcmp one float %a, %b
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br i1 %cmp, label %bb34, label %bb33
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bb33:
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unreachable
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bb34:
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unreachable
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}
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