Vasileios Kalintiris 93f6871925 [mips] Sign-extend i32 values truncated from previously zero-extended i32 values. ... Summary: This is a special case for MIPS64 because the architecture requires properly 32-bit sign-extended values in the register containers. Additionaly, we merge consecutive trunc + AssertZExt nodes in order to avoid unnecessary sign-extensions when the extension comes from a type smaller than i32. Reviewers: dsanders Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D18893 llvm-svn: 266203		2016-04-13 15:07:45 +00:00
..
AArch64	Recommit r265547, and r265610,r265639,r265657 on top of it, plus	2016-04-13 03:08:27 +00:00
AMDGPU	AMDGPU: Add test for m0 initialization in basic loop	2016-04-13 00:39:52 +00:00
ARM	Recommit r265547, and r265610,r265639,r265657 on top of it, plus	2016-04-13 03:08:27 +00:00
BPF
CPP
Generic	Add missing test for the "Don't delete empty preheaders" added in r265397	2016-04-05 14:21:32 +00:00
Hexagon	Revert r265817	2016-04-08 18:15:37 +00:00
Inputs
Lanai	[lanai] LanaiSetflagAluCombiner more conservative	2016-04-05 16:18:13 +00:00
Mips	[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.	2016-04-13 15:07:45 +00:00
MIR	CodeGen: Clear the MFI's save and restore point after PrologEpilogInserter	2016-04-12 23:21:53 +00:00
MSP430
NVPTX	[NVPTX] Handle ldg created from sign-/zero-extended load	2016-04-05 12:38:01 +00:00
PowerPC	[PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0	2016-04-12 03:10:52 +00:00
SPARC
SystemZ	[SystemZ] Support conditional indirect sibling calls via BCR	2016-04-11 12:12:32 +00:00
Thumb	Revert r265817	2016-04-08 18:15:37 +00:00
Thumb2	ARM: use r7 as the frame-pointer on all MachO targets.	2016-04-11 22:27:40 +00:00
WebAssembly	[WebAssembly] Fix debug info in reg-stackify.ll test	2016-04-12 20:12:05 +00:00
WinEH
X86	[X86][SSE] Regenerated vector integer absolute tests	2016-04-13 12:40:22 +00:00
XCore