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7193bf43c5
When the memory vectorizer is enabled, these tests break. These tests don't really care about the memory instructions, and it's easier to write check lines with the unmerged loads. llvm-svn: 266071
156 lines
5.2 KiB
LLVM
156 lines
5.2 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
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; GCN-LABEL: {{^}}mac_vvv:
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; GCN: buffer_load_dword [[A:v[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0{{$}}
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; GCN: buffer_load_dword [[B:v[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0 offset:4
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; GCN: buffer_load_dword [[C:v[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0 offset:8
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; GCN: v_mac_f32_e32 [[C]], [[B]], [[A]]
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; GCN: buffer_store_dword [[C]]
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define void @mac_vvv(float addrspace(1)* %out, float addrspace(1)* %in) {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%c_ptr = getelementptr float, float addrspace(1)* %in, i32 2
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%a = load volatile float, float addrspace(1)* %in
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%b = load volatile float, float addrspace(1)* %b_ptr
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%c = load volatile float, float addrspace(1)* %c_ptr
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%tmp0 = fmul float %a, %b
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%tmp1 = fadd float %tmp0, %c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mad_inline_sgpr_inline:
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; GCN-NOT: v_mac_f32
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; GCN: v_mad_f32 v{{[0-9]}}, 0.5, s{{[0-9]+}}, 0.5
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define void @mad_inline_sgpr_inline(float addrspace(1)* %out, float %in) {
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entry:
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%tmp0 = fmul float 0.5, %in
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%tmp1 = fadd float %tmp0, 0.5
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mad_vvs:
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; GCN-NOT: v_mac_f32
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; GCN: v_mad_f32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, s{{[0-9]+}}
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define void @mad_vvs(float addrspace(1)* %out, float addrspace(1)* %in, float %c) {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%a = load float, float addrspace(1)* %in
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%b = load float, float addrspace(1)* %b_ptr
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%tmp0 = fmul float %a, %b
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%tmp1 = fadd float %tmp0, %c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mac_ssv:
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; GCN: v_mac_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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define void @mac_ssv(float addrspace(1)* %out, float addrspace(1)* %in, float %a) {
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entry:
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%c = load float, float addrspace(1)* %in
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%tmp0 = fmul float %a, %a
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%tmp1 = fadd float %tmp0, %c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mac_mad_same_add:
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; GCN: v_mad_f32 v{{[0-9]}}, v{{[0-9]+}}, v{{[0-9]+}}, [[ADD:v[0-9]+]]
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; GCN: v_mac_f32_e32 [[ADD]], v{{[0-9]+}}, v{{[0-9]+}}
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define void @mac_mad_same_add(float addrspace(1)* %out, float addrspace(1)* %in) {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%c_ptr = getelementptr float, float addrspace(1)* %in, i32 2
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%d_ptr = getelementptr float, float addrspace(1)* %in, i32 3
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%e_ptr = getelementptr float, float addrspace(1)* %in, i32 4
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%a = load volatile float, float addrspace(1)* %in
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%b = load volatile float, float addrspace(1)* %b_ptr
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%c = load volatile float, float addrspace(1)* %c_ptr
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%d = load volatile float, float addrspace(1)* %d_ptr
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%e = load volatile float, float addrspace(1)* %e_ptr
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%tmp0 = fmul float %a, %b
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%tmp1 = fadd float %tmp0, %c
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%tmp2 = fmul float %d, %e
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%tmp3 = fadd float %tmp2, %c
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%out1 = getelementptr float, float addrspace(1)* %out, i32 1
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store float %tmp1, float addrspace(1)* %out
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store float %tmp3, float addrspace(1)* %out1
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ret void
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}
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; There is no advantage to using v_mac when one of the operands is negated
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; and v_mad accepts more operand types.
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; GCN-LABEL: {{^}}mad_neg_src0:
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; GCN-NOT: v_mac_f32
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; GCN: v_mad_f32 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}, v{{[-0-9]}}
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define void @mad_neg_src0(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%c_ptr = getelementptr float, float addrspace(1)* %in, i32 2
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%a = load float, float addrspace(1)* %in
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%b = load float, float addrspace(1)* %b_ptr
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%c = load float, float addrspace(1)* %c_ptr
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%neg_a = fsub float 0.0, %a
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%tmp0 = fmul float %neg_a, %b
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%tmp1 = fadd float %tmp0, %c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mad_neg_src1:
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; GCN-NOT: v_mac_f32
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; GCN: v_mad_f32 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}, v{{[-0-9]}}
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define void @mad_neg_src1(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%c_ptr = getelementptr float, float addrspace(1)* %in, i32 2
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%a = load float, float addrspace(1)* %in
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%b = load float, float addrspace(1)* %b_ptr
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%c = load float, float addrspace(1)* %c_ptr
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%neg_b = fsub float 0.0, %b
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%tmp0 = fmul float %a, %neg_b
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%tmp1 = fadd float %tmp0, %c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}mad_neg_src2:
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; GCN-NOT: v_mac
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; GCN: v_mad_f32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, -v{{[-0-9]}}
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define void @mad_neg_src2(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
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entry:
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%b_ptr = getelementptr float, float addrspace(1)* %in, i32 1
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%c_ptr = getelementptr float, float addrspace(1)* %in, i32 2
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%a = load float, float addrspace(1)* %in
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%b = load float, float addrspace(1)* %b_ptr
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%c = load float, float addrspace(1)* %c_ptr
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%neg_c = fsub float 0.0, %c
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%tmp0 = fmul float %a, %b
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%tmp1 = fadd float %tmp0, %neg_c
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store float %tmp1, float addrspace(1)* %out
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ret void
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}
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attributes #0 = { "true" "unsafe-fp-math"="true" }
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