Ahmed Bougacha 104eede8a8 [CodeGen] Promote FMINNAN/FMAXNAN like other binops. ... We think it's OK to generate half fminnan because it's legal for the transform-to type (f32; r245196). However, PromoteFloatRes was missing the case; simply promote like the other binops, including minnum. llvm-svn: 271317		2016-05-31 18:50:25 +00:00
..
AArch64	Delete AArch64II::MO_CONSTPOOL.	2016-05-31 18:31:14 +00:00
AMDGPU	AMDGPU: Cleanup vector insert/extract tests	2016-05-28 00:51:06 +00:00
ARM	[CodeGen] Promote FMINNAN/FMAXNAN like other binops.	2016-05-31 18:50:25 +00:00
BPF	[BPF] Remove exit-on-error from tests (PR27768, PR27769)	2016-05-30 08:28:34 +00:00
Generic	llc: Rework -run-pass option	2016-05-10 01:32:44 +00:00
Hexagon	[Hexagon] Enable the post-RA scheduler	2016-05-26 19:44:28 +00:00
Inputs
Lanai	[lanai] Change reloc to use PIC_ by default and cleanup.	2016-05-20 21:41:53 +00:00
Mips	[mips] bnec/beqc register constraint fix	2016-05-31 09:54:55 +00:00
MIR	Add test/CodeGen/MIR/Hexagon/lit.local.cfg	2016-05-26 18:35:45 +00:00
MSP430
NVPTX	[NVPTX] Added NVVMIntrRange pass	2016-05-26 17:02:56 +00:00
PowerPC	Move and add comments to the top for tailcall-string-rvo.ll	2016-05-25 17:01:09 +00:00
SPARC	[SPARC] Fix 8 and 16-bit atomic load and store.	2016-05-23 20:33:00 +00:00
SystemZ	[SystemZ] Fix register ordering for BinaryRRF instructions	2016-05-18 13:24:57 +00:00
Thumb	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
Thumb2	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
WebAssembly	[WebAssembly] Put __stack_pointer in the offset field of loads and stores.	2016-05-24 23:47:41 +00:00
WinEH
X86	[X86][SSE] Add load-folding patterns for (V)CVTDQ2PD (PR27291)	2016-05-31 12:04:35 +00:00
XCore