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History

Daniel Sanders 94bc1c84bc [mips] SelectionDAGISel subclasses now follow the optimization level.

Summary:
It was recently discovered that, for Mips's SelectionDAGISel subclasses,
all optimization levels caused SelectionDAGISel to behave like -O2.

This change adds the necessary plumbing to initialize the optimization level.

Reviewers: andrew.w.kaylor

Subscribers: andrew.w.kaylor, sdardis, dean, llvm-commits, vradosavljevic, petarj, qcolombet, probinson, dsanders

Differential Revision: https://reviews.llvm.org/D14900

llvm-svn: 275410

2016-07-14 13:25:22 +00:00

AsmParser

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

Disassembler

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

InstPrinter

[mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions

2016-06-15 07:46:24 +00:00

MCTargetDesc

Fix branch relaxation in 16-bit mode.

2016-07-11 14:23:53 +00:00

TargetInfo

Remove autoconf support

2016-01-26 21:29:08 +00:00

CMakeLists.txt

[mips] MIPS32R6 compact branch support

2016-03-14 16:24:05 +00:00

LLVMBuild.txt

Wrap some long lines in LLVMBuild files. NFC

2015-06-12 18:44:57 +00:00

MicroMips32r6InstrFormats.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MicroMips32r6InstrInfo.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MicroMips64r6InstrFormats.td

[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions

2016-06-27 08:23:28 +00:00

MicroMips64r6InstrInfo.td

[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions

2016-06-27 08:23:28 +00:00

MicroMipsDSPInstrFormats.td

[mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions

2016-05-17 09:32:58 +00:00

MicroMipsDSPInstrInfo.td

[mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions

2016-05-17 09:32:58 +00:00

MicroMipsInstrFormats.td

[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions

2016-06-27 08:23:28 +00:00

MicroMipsInstrFPU.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MicroMipsInstrInfo.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

Mips16FrameLowering.cpp

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

Mips16FrameLowering.h

PrologEpilogInserter: Rewrite API to determine callee save regsiters.

2015-07-14 17:17:13 +00:00

Mips16HardFloat.cpp

Convert more cases to isPositionIndependent(). NFC.

2016-06-28 14:33:28 +00:00

Mips16HardFloatInfo.cpp

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

Mips16HardFloatInfo.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

Mips16InstrFormats.td

…

Mips16InstrInfo.cpp

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

2016-06-30 00:01:54 +00:00

Mips16InstrInfo.h

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

2016-06-30 00:01:54 +00:00

Mips16InstrInfo.td

[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.

2016-06-16 10:20:59 +00:00

Mips16ISelDAGToDAG.cpp

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

Mips16ISelDAGToDAG.h

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

Mips16ISelLowering.cpp

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

Mips16ISelLowering.h

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

Mips16RegisterInfo.cpp

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

Mips16RegisterInfo.h

Remove the need to cache the subtarget in the Mips TargetRegisterInfo

2015-03-12 05:43:57 +00:00

Mips32r6InstrFormats.td

[PATCH] [mips] Restrict the creation of compact branches

2016-05-18 10:38:01 +00:00

Mips32r6InstrInfo.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

Mips64InstrInfo.td

[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions

2016-06-27 08:23:28 +00:00

Mips64r6InstrInfo.td

[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions

2016-06-27 08:23:28 +00:00

Mips.h

Delete dead code. NFC.

2016-06-28 14:26:39 +00:00

Mips.td

[mips][atomics] Fix atomic instruction descriptions and uses.

2016-06-14 11:29:28 +00:00

MipsAnalyzeImmediate.cpp

…

MipsAnalyzeImmediate.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

MipsAsmPrinter.cpp

Use isPositionIndependent(). NFC.

2016-06-27 17:21:46 +00:00

MipsAsmPrinter.h

[mips] Range check uimm20 and fixed a bug this revealed.

2016-02-29 16:06:38 +00:00

MipsCallingConv.td

[mips] EABI CodeGen is completely untested and seems to have bitrotted. Remove it.

2016-06-03 10:38:09 +00:00

MipsCCState.cpp

[mips] Fix an issue with long double when function roundl is defined

2016-03-14 12:50:23 +00:00

MipsCCState.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

MipsCondMov.td

[mips] Replace AdditionalRequires<[IsGP64bit]> with GPR_64. NFC.

2016-06-15 10:36:16 +00:00

MipsConstantIslandPass.cpp

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsDelaySlotFiller.cpp

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsDSPInstrFormats.td

[mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W.PH instructions

2016-05-13 11:32:53 +00:00

MipsDSPInstrInfo.td

[mips] MIPS32/64 itineraries

2016-06-14 09:35:29 +00:00

MipsEVAInstrFormats.td

[mips] Added support for various EVA ASE instructions.

2015-09-15 10:02:16 +00:00

MipsEVAInstrInfo.td

[mips] MIPS32/64 itineraries

2016-06-14 09:35:29 +00:00

MipsFastISel.cpp

Convert more cases to isPositionIndependent(). NFC.

2016-06-28 14:33:28 +00:00

MipsFrameLowering.cpp

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

MipsFrameLowering.h

Change eliminateCallFramePseudoInstr() to return an iterator

2016-03-31 18:33:38 +00:00

MipsHazardSchedule.cpp

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsInstrFormats.td

[mips] MIPS32R6 compact branch support

2016-03-14 16:24:05 +00:00

MipsInstrFPU.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MipsInstrInfo.cpp

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsInstrInfo.h

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsInstrInfo.td

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MipsISelDAGToDAG.cpp

[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support

2016-07-11 07:41:56 +00:00

MipsISelDAGToDAG.h

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

MipsISelLowering.cpp

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

MipsISelLowering.h

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

MipsLongBranch.cpp

Mips: Avoid implicit iterator conversions, NFC

2016-07-12 01:47:02 +00:00

MipsMachineFunction.cpp

[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.

2016-06-16 10:20:59 +00:00

MipsMachineFunction.h

[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.

2016-06-16 10:20:59 +00:00

MipsMCInstLower.cpp

[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.

2016-05-03 13:35:44 +00:00

MipsMCInstLower.h

[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.

2016-05-03 13:35:44 +00:00

MipsModuleISelDAGToDAG.cpp

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

MipsMSAInstrFormats.td

[mips] Use PredicateControl for the MSA ASE instructions. NFC.

2015-09-24 12:10:23 +00:00

MipsMSAInstrInfo.td

[mips] Add instruction itineraries for LSA, DLSA

2016-06-27 14:55:07 +00:00

MipsOptimizePICCall.cpp

…

MipsOptionRecord.h

[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.

2015-06-27 15:39:19 +00:00

MipsOs16.cpp

[mips] Use range-based for loops. NFC.

2016-04-08 10:33:00 +00:00

MipsRegisterInfo.cpp

[mips][ias] Attempt to fix 'not all control paths return a value' reported by MSVC.

2016-05-09 15:37:52 +00:00

MipsRegisterInfo.h

[mips][micromips] Make getPointerRegClass() result depend on the instruction.

2016-05-09 13:38:25 +00:00

MipsRegisterInfo.td

[mips][micromips] Make getPointerRegClass() result depend on the instruction.

2016-05-09 13:38:25 +00:00

MipsSchedule.td

[mips] MIPS32/64 itineraries

2016-06-14 09:35:29 +00:00

MipsScheduleP5600.td

TableGen: Check scheduling models for completeness

2016-03-01 20:03:21 +00:00

MipsSEFrameLowering.cpp

Replace silly uses of 'signed' with 'int'

2016-06-21 05:10:24 +00:00

MipsSEFrameLowering.h

Re-apply "[mips] Use correct frame register for DWARF info when dynamically realigning the stack.""

2015-11-12 14:11:43 +00:00

MipsSEInstrInfo.cpp

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

2016-06-30 00:01:54 +00:00

MipsSEInstrInfo.h

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

2016-06-30 00:01:54 +00:00

MipsSEISelDAGToDAG.cpp

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

MipsSEISelDAGToDAG.h

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

MipsSEISelLowering.cpp

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

MipsSEISelLowering.h

CodeGen: Use MachineInstr& in TargetLowering, NFC

2016-06-30 22:52:52 +00:00

MipsSERegisterInfo.cpp

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

MipsSERegisterInfo.h

Remove the need to cache the subtarget in the Mips TargetRegisterInfo

2015-03-12 05:43:57 +00:00

MipsSubtarget.cpp

Convert more cases to isPositionIndependent(). NFC.

2016-06-28 14:33:28 +00:00

MipsSubtarget.h

Convert more cases to isPositionIndependent(). NFC.

2016-06-28 14:33:28 +00:00

MipsTargetMachine.cpp

[mips] SelectionDAGISel subclasses now follow the optimization level.

2016-07-14 13:25:22 +00:00

MipsTargetMachine.h

Delete Reloc::Default.

2016-05-18 22:04:49 +00:00

MipsTargetObjectFile.cpp

Unbreak non-X86 targets from fallout caused by r261462

2016-02-21 01:40:04 +00:00

MipsTargetObjectFile.h

Unbreak non-X86 targets from fallout caused by r261462

2016-02-21 01:40:04 +00:00

MipsTargetStreamer.h

Move instances of std::function.

2016-06-12 16:13:55 +00:00

MSA.txt

Revert: r249536 - Testing commit access with a trival whitespace change.

2015-10-07 10:57:06 +00:00