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https://github.com/RPCS3/llvm-mirror.git
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0c608d85e0
Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
192 lines
3.5 KiB
LLVM
192 lines
3.5 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt | FileCheck %s
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declare void @foo(i32)
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declare void @foo64(i64)
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; CHECK: neg:
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; CHECK: negl %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @neg(i32 %x) nounwind {
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%sub = sub i32 0, %x
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%cmp = icmp eq i32 %sub, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %sub)
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br label %return
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return:
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ret void
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}
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; CHECK: sar:
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; CHECK: sarl %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @sar(i32 %x) nounwind {
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%ashr = ashr i32 %x, 1
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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; CHECK: shr:
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; CHECK: shrl %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @shr(i32 %x) nounwind {
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%ashr = lshr i32 %x, 1
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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; CHECK: shri:
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; CHECK: shrl $3, %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @shri(i32 %x) nounwind {
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%ashr = lshr i32 %x, 3
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%cmp = icmp eq i32 %ashr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %ashr)
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br label %return
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return:
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ret void
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}
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; CHECK: shl:
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; CHECK: addl %edi, %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @shl(i32 %x) nounwind {
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%shl = shl i32 %x, 1
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%cmp = icmp eq i32 %shl, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %shl)
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br label %return
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return:
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ret void
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}
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; CHECK: shli:
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; CHECK: shll $4, %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @shli(i32 %x) nounwind {
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%shl = shl i32 %x, 4
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%cmp = icmp eq i32 %shl, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %shl)
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br label %return
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return:
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ret void
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}
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; CHECK: adc:
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; CHECK: movabsq $-9223372036854775808, %rax
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; CHECK-NEXT: addq %rdi, %rax
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; CHECK-NEXT: adcq $0, %rsi
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; CHECK-NEXT: sete %al
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; CHECK: ret
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define zeroext i1 @adc(i128 %x) nounwind {
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%add = add i128 %x, 9223372036854775808
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%cmp = icmp ult i128 %add, 18446744073709551616
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ret i1 %cmp
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}
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; CHECK: sbb:
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; CHECK: cmpq %rdx, %rdi
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; CHECK-NEXT: sbbq %rcx, %rsi
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; CHECK-NEXT: setns %al
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; CHECK: ret
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define zeroext i1 @sbb(i128 %x, i128 %y) nounwind {
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%sub = sub i128 %x, %y
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%cmp = icmp sge i128 %sub, 0
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ret i1 %cmp
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}
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; CHECK: andn:
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; CHECK: andnl %esi, %edi, %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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define void @andn(i32 %x, i32 %y) nounwind {
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%not = xor i32 %x, -1
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%andn = and i32 %y, %not
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%cmp = icmp eq i32 %andn, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %andn)
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br label %return
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return:
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ret void
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}
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; CHECK: bextr:
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; CHECK: bextrl %esi, %edi, %edi
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone
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define void @bextr(i32 %x, i32 %y) nounwind {
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%bextr = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)
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%cmp = icmp eq i32 %bextr, 0
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br i1 %cmp, label %return, label %bb
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bb:
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tail call void @foo(i32 %bextr)
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br label %return
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return:
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ret void
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}
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; CHECK: popcnt:
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; CHECK: popcntl
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; CHECK-NEXT: je
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; CHECK: jmp foo
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; CHECK: ret
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declare i32 @llvm.ctpop.i32(i32) nounwind readnone
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define void @popcnt(i32 %x) nounwind {
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%popcnt = tail call i32 @llvm.ctpop.i32(i32 %x)
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%cmp = icmp eq i32 %popcnt, 0
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br i1 %cmp, label %return, label %bb
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;
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bb:
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tail call void @foo(i32 %popcnt)
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br label %return
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;
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return:
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ret void
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}
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