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llvm-mirror/test/MC/Disassembler/PowerPC
Lei Huang 852a9b0475 [PowerPC] Fix incorrectly encoded wait instruction
Encoding for the wait instruction was wrong. Fix according to ISA 3.0.

Differential Revision: https://reviews.llvm.org/D48550

llvm-svn: 335514
2018-06-25 19:28:27 +00:00
..
dcbt.txt
lit.local.cfg
ppc32-extpid-e500.txt PowerPC: support external pid instructions in MC layer. 2017-12-10 08:43:19 +00:00
ppc64-encoding-4xx.txt
ppc64-encoding-6xx.txt
ppc64-encoding-bookII.txt [PowerPC] Fix incorrectly encoded wait instruction 2018-06-25 19:28:27 +00:00
ppc64-encoding-bookIII.txt Add some Book-E instructions to the asm parser and printer. 2017-01-29 04:55:57 +00:00
ppc64-encoding-e500.txt
ppc64-encoding-ext.txt
ppc64-encoding-fp.txt [Power9] Add new instructions for floating point status and control registers. 2017-08-28 18:46:01 +00:00
ppc64-encoding-p8vector.txt
ppc64-encoding-p9vector.txt [PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0 2017-05-11 22:17:35 +00:00
ppc64-encoding-vmx.txt
ppc64-encoding.txt [Power9] Add missing Power9 instructions. 2017-09-19 15:22:36 +00:00
ppc64-operands.txt
ppc64le-encoding.txt [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions. 2017-06-12 17:58:42 +00:00
qpx.txt
vsx.txt [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. 2018-02-23 15:55:16 +00:00