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llvm-mirror/lib/CodeGen/GlobalISel
Amara Emerson b8f4c2339b [GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.
During lowering of G_UMULO and friends, the previous code moved the builder's
insertion point to be after the legalizing instruction. When that happened, if
there happened to be a "G_CONSTANT i32 0" immediately after, the CSEMIRBuilder
would try to find that constant during the buildConstant(zero) call, and since
it dominates itself would return the iterator unchanged, even though the def
of the constant was *after* the current insertion point. This resulted in the
compare being generated *before* the constant which it was using.

There's no need to modify the insertion point before building the mul-hi or
constant. Delaying moving the insert point ensures those are built/CSEd before
the G_ICMP is built.

Fixes PR47679

Differential Revision: https://reviews.llvm.org/D88514

(cherry picked from commit 1d54e75cf26a4c60b66659d5d9c62f4bb9452b03)
2020-09-30 13:05:48 +02:00
..
CallLowering.cpp AArch64/GlobalISel: Reduced patch for bug 47619 2020-09-25 13:16:13 +02:00
CMakeLists.txt [GlobalISel] Introduce InlineAsmLowering class 2020-04-20 15:10:18 +02:00
Combiner.cpp [gicombiner] Add the run-time rule disable option 2019-10-17 00:37:04 +00:00
CombinerHelper.cpp [AArch64][GlobalISel] Add post-legalize combine for sext_inreg(trunc(sextload)) -> copy 2020-07-13 20:27:45 -07:00
CSEInfo.cpp GlobalISel: Use Register 2020-06-08 10:15:53 -04:00
CSEMIRBuilder.cpp [CodeGen] Make use of MachineInstrBuilder::getReg 2020-01-23 13:38:13 +00:00
GISelChangeObserver.cpp [GlobalISel]: Fix some non determinism exposed in CSE due to not notifying observers about mutations + add verification for CSE 2020-02-18 14:54:57 -08:00
GISelKnownBits.cpp [AArch64][GlobalISel] Add post-legalize combine for sext_inreg(trunc(sextload)) -> copy 2020-07-13 20:27:45 -07:00
GlobalISel.cpp
InlineAsmLowering.cpp [GlobalISel][InlineAsm] Fix matching input constraint to physreg 2020-08-07 19:48:51 +02:00
InstructionSelect.cpp GlobalISel: Move finalizeLowering call later 2020-07-06 09:19:40 -04:00
InstructionSelector.cpp GlobalISel: Remove unused function argument 2020-02-14 15:57:39 -08:00
IRTranslator.cpp AArch64+ARM: make LLVM consider system registers volatile. 2020-07-15 09:47:36 +01:00
LegalityPredicates.cpp GlobalISel: Work on improving stock set of legality predicates 2020-05-28 20:28:24 -04:00
LegalizeMutations.cpp
Legalizer.cpp GlobalISel: Improve MachineIRBuilder construction 2020-06-09 15:05:04 -04:00
LegalizerHelper.cpp [GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR. 2020-09-30 13:05:48 +02:00
LegalizerInfo.cpp GlobalISel: Make default implementation of legalizeCustom unreachable 2020-06-10 11:05:59 -04:00
LLVMBuild.txt Make GlobalISel depend on SelectionDAG after D63169 2019-06-22 01:30:17 +00:00
Localizer.cpp Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses."" 2020-03-06 21:35:08 -08:00
LostDebugLocObserver.cpp Give helpers internal linkage. NFC. 2020-04-25 11:50:52 +02:00
MachineIRBuilder.cpp [GlobalISel] fix crash in IRTranslator, MachineIRBuilder when translating @llvm.dbg.value intrinsic and using -debug 2020-06-11 10:47:49 +02:00
RegBankSelect.cpp [GlobalISel][InlineAsm] Add support for basic output operand constraints 2020-05-06 10:06:13 +02:00
RegisterBank.cpp Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" 2020-03-20 11:02:50 +01:00
RegisterBankInfo.cpp Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" 2020-03-20 11:02:50 +01:00
Utils.cpp GlobalISel: Use early return and reduce indentation 2020-06-16 14:47:08 -04:00