mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
ff134760ac
Testcases provided by Tim Renouf. Differential Revision: https://reviews.llvm.org/D48102 llvm-svn: 335472
134 lines
4.3 KiB
YAML
134 lines
4.3 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=simple-register-coalescing -o - %s | FileCheck -check-prefix=GCN %s
|
|
|
|
# With one version of the D48102 fix, this test failed with
|
|
# Assertion failed: (ValNo && "CopyMI input register not live"), function reMaterializeTrivialDef, file ../lib/CodeGen/RegisterCoalescer.cpp, line 1107.
|
|
|
|
# GCN: {{^body}}
|
|
|
|
--- |
|
|
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
|
|
target triple = "amdgcn--amdpal"
|
|
|
|
define amdgpu_cs void @_amdgpu_cs_main(<3 x i32>) #0 {
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind "target-cpu"="gfx803" }
|
|
...
|
|
|
|
---
|
|
name: _amdgpu_cs_main
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
%0:vgpr_32 = V_MUL_F32_e32 0, undef %1:vgpr_32, implicit $exec
|
|
%2:vgpr_32 = V_CVT_U32_F32_e32 killed %0, implicit $exec
|
|
%3:vgpr_32 = V_CVT_F32_I32_e32 killed %2, implicit $exec
|
|
%4:vgpr_32 = V_CVT_U32_F32_e32 killed %3, implicit $exec
|
|
%5:vgpr_32 = V_LSHRREV_B32_e32 4, killed %4, implicit $exec
|
|
S_CBRANCH_SCC0 %bb.2, implicit undef $scc
|
|
|
|
bb.1:
|
|
successors: %bb.5(0x80000000)
|
|
undef %6.sub1:vreg_128 = COPY killed %5
|
|
%7:vreg_128 = COPY killed %6
|
|
S_BRANCH %bb.5
|
|
|
|
bb.2:
|
|
successors: %bb.3(0x40000000), %bb.4(0x40000000)
|
|
S_CBRANCH_SCC0 %bb.4, implicit undef $scc
|
|
|
|
bb.3:
|
|
successors: %bb.5(0x80000000)
|
|
%8:sreg_32_xm0 = S_MOV_B32 0
|
|
undef %9.sub0:sreg_128 = COPY %8
|
|
%9.sub1:sreg_128 = COPY %8
|
|
%9.sub2:sreg_128 = COPY %8
|
|
%9.sub3:sreg_128 = COPY killed %8
|
|
%10:vreg_128 = COPY killed %9
|
|
%7:vreg_128 = COPY killed %10
|
|
S_BRANCH %bb.5
|
|
|
|
bb.4:
|
|
successors: %bb.5(0x80000000)
|
|
%11:sreg_32_xm0 = S_MOV_B32 0
|
|
undef %12.sub0:sreg_128 = COPY %11
|
|
%12.sub1:sreg_128 = COPY %11
|
|
%12.sub2:sreg_128 = COPY %11
|
|
%12.sub3:sreg_128 = COPY killed %11
|
|
%13:sreg_128 = COPY killed %12
|
|
%14:vreg_128 = COPY killed %13
|
|
%7:vreg_128 = COPY killed %14
|
|
|
|
bb.5:
|
|
successors: %bb.8(0x40000000), %bb.6(0x40000000)
|
|
%15:vreg_128 = COPY killed %7
|
|
S_CBRANCH_SCC0 %bb.8, implicit undef $scc
|
|
|
|
bb.6:
|
|
successors: %bb.7(0x80000000)
|
|
%16:vreg_128 = COPY killed %15
|
|
|
|
bb.7:
|
|
successors: %bb.14(0x80000000)
|
|
%17:vreg_128 = COPY killed %16
|
|
S_BRANCH %bb.14
|
|
|
|
bb.8:
|
|
successors: %bb.9(0x40000000), %bb.11(0x40000000)
|
|
%18:vgpr_32 = V_MUL_LO_I32 %15.sub1, target-flags(amdgpu-gotprel32-lo) 7, implicit $exec
|
|
S_CBRANCH_SCC1 %bb.11, implicit undef $scc
|
|
S_BRANCH %bb.9
|
|
|
|
bb.9:
|
|
successors: %bb.10(0x80000000)
|
|
%19:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN killed %18, undef %20:sreg_128, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from constant-pool, align 1, addrspace 4)
|
|
%21:sreg_64 = V_CMP_NE_U32_e64 target-flags(amdgpu-gotprel) 0, killed %19.sub0, implicit $exec
|
|
%22:sreg_64 = COPY $exec, implicit-def $exec
|
|
%23:sreg_64 = S_AND_B64 %22, %21, implicit-def dead $scc
|
|
$exec = S_MOV_B64_term killed %23
|
|
|
|
bb.10:
|
|
successors: %bb.12(0x80000000)
|
|
$exec = S_OR_B64 $exec, killed %22, implicit-def $scc
|
|
S_BRANCH %bb.12
|
|
|
|
bb.11:
|
|
successors: %bb.13(0x80000000)
|
|
%24:vreg_128 = COPY killed %15
|
|
%24.sub0:vreg_128 = COPY undef %18
|
|
S_BRANCH %bb.13
|
|
|
|
bb.12:
|
|
successors: %bb.11(0x80000000)
|
|
S_BRANCH %bb.11
|
|
|
|
bb.13:
|
|
successors: %bb.7(0x80000000)
|
|
%16:vreg_128 = COPY killed %24
|
|
S_BRANCH %bb.7
|
|
|
|
bb.14:
|
|
successors: %bb.15(0x80000000)
|
|
S_CBRANCH_SCC1 %bb.15, implicit undef $scc
|
|
S_BRANCH %bb.15
|
|
|
|
bb.15:
|
|
undef %25.sub2:vreg_128 = COPY killed %17.sub2
|
|
%26:sreg_32_xm0 = S_MOV_B32 0
|
|
undef %27.sub0:sreg_256 = COPY %26
|
|
%27.sub1:sreg_256 = COPY %26
|
|
%27.sub2:sreg_256 = COPY %26
|
|
%27.sub3:sreg_256 = COPY %26
|
|
%27.sub4:sreg_256 = COPY %26
|
|
%27.sub5:sreg_256 = COPY %26
|
|
%27.sub6:sreg_256 = COPY %26
|
|
%27.sub7:sreg_256 = COPY killed %26
|
|
%28:vgpr_32 = IMAGE_LOAD_V1_V4 killed %25, killed %27, 2, -1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from constant-pool, addrspace 4)
|
|
%29:vgpr_32 = V_ADD_F32_e32 0, killed %28, implicit $exec
|
|
$m0 = S_MOV_B32 -1
|
|
DS_WRITE_B32 undef %30:vgpr_32, killed %29, 0, 0, implicit $m0, implicit $exec :: (store 4 into `i32 addrspace(3)* undef`, addrspace 3)
|
|
S_ENDPGM
|
|
...
|