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329a30125b
The SchedModel allows the addition of ReadAdvances to express that certain operands of the instructions are needed at a later point than the others. RegAlloc may add pseudo operands that are not part of the instruction descriptor, and therefore cannot have any read advance entries. This meant that in some cases the desired read advance was nullified by such a pseudo operand, which still had the original latency. This patch fixes this by making sure that such pseudo operands get a zero latency during DAG construction. Review: Matthias Braun, Ulrich Weigand. https://reviews.llvm.org/D49671 llvm-svn: 345606
54 lines
2.2 KiB
LLVM
54 lines
2.2 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s
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; RUN: llc -march=amdgcn -mcpu=hawaii -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=CI %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX9 -check-prefix=VI %s
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; Test calls when called by other callable functions rather than
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; kernels.
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declare void @external_void_func_i32(i32) #0
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm:
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; GCN: s_waitcnt
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; GCN: s_mov_b32 s5, s32
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; Spill CSR VGPR used for SGPR spilling
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; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:4
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; GCN-DAG: s_add_u32 s32, s32, 0x400
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; GCN-DAG: v_writelane_b32 v32, s33, 0
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; GCN-DAG: v_writelane_b32 v32, s34, 1
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; GCN-DAG: v_writelane_b32 v32, s35, 2
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; GCN: s_swappc_b64
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; GCN: v_readlane_b32 s35, v32, 2
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; GCN: v_readlane_b32 s34, v32, 1
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; GCN: v_readlane_b32 s33, v32, 0
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; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:4
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; GCN: s_sub_u32 s32, s32, 0x400
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; GCN: s_setpc_b64
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define void @test_func_call_external_void_func_i32_imm() #0 {
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call void @external_void_func_i32(i32 42)
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ret void
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}
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm_stack_use:
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; GCN: s_waitcnt
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; GCN: s_mov_b32 s5, s32
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; GCN-DAG: s_add_u32 s32, s32, 0x1400{{$}}
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; GCN-DAG: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s5 offset
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; GCN: s_swappc_b64
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; GCN: s_sub_u32 s32, s32, 0x1400{{$}}
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; GCN: s_setpc_b64
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define void @test_func_call_external_void_func_i32_imm_stack_use() #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%gep0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 0
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%gep15 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 16
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store volatile i32 0, i32 addrspace(5)* %gep0
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store volatile i32 0, i32 addrspace(5)* %gep15
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call void @external_void_func_i32(i32 42)
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind noinline }
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