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c2db7efb6c
This patch complements D16810 "[mips] Make isel select the correct DEXT variant up front.". Now ISel picks the right variant of DINS, so now there is no need to replace DINS with the appropriate variant during MipsMCCodeEmitter::encodeInstruction(). This patch also enables target specific instruction verification for ins, dins, dinsm, dinsu, ext, dext, dextm, dextu. These instructions have constraints that are checked when generating MipsISD::Ins and MipsISD::Ext nodes, but these constraints are not checked during instruction selection. Adding machine verification should catch outstanding cases. Finally, correct a bug that instruction verification uncovered, where the position operand of a DINSU generated during lowering was being silently and accidently corrected to the correct value. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D34809 llvm-svn: 313254
687 lines
16 KiB
LLVM
687 lines
16 KiB
LLVM
; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips4 -mattr=+soft-float -O1 \
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; RUN: -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
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; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6,NOT-R2R6
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; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64 -mattr=+soft-float -O1 \
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; RUN: -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
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; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6,NOT-R2R6
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; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r2 -mattr=+soft-float \
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; RUN: -O1 -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
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; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6,R2R6
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; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r6 -mattr=+soft-float \
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; RUN: -O1 -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
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; RUN: %s -check-prefixes=ALL,CMP_CC_FMT,R6,R2R6
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@gld0 = external global fp128
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@gld1 = external global fp128
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@gld2 = external global fp128
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@gf1 = external global float
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@gd1 = external global double
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; ALL-LABEL: addLD:
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; ALL: ld $25, %call16(__addtf3)
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define fp128 @addLD() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%add = fadd fp128 %0, %1
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ret fp128 %add
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}
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; ALL-LABEL: subLD:
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; ALL: ld $25, %call16(__subtf3)
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define fp128 @subLD() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%sub = fsub fp128 %0, %1
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ret fp128 %sub
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}
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; ALL-LABEL: mulLD:
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; ALL: ld $25, %call16(__multf3)
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define fp128 @mulLD() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%mul = fmul fp128 %0, %1
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ret fp128 %mul
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}
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; ALL-LABEL: divLD:
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; ALL: ld $25, %call16(__divtf3)
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define fp128 @divLD() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%div = fdiv fp128 %0, %1
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ret fp128 %div
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}
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; ALL-LABEL: conv_LD_char:
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; ALL: ld $25, %call16(__floatsitf)
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define fp128 @conv_LD_char(i8 signext %a) {
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entry:
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%conv = sitofp i8 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_short:
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; ALL: ld $25, %call16(__floatsitf)
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define fp128 @conv_LD_short(i16 signext %a) {
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entry:
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%conv = sitofp i16 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_int:
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; ALL: ld $25, %call16(__floatsitf)
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define fp128 @conv_LD_int(i32 %a) {
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entry:
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%conv = sitofp i32 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_LL:
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; ALL: ld $25, %call16(__floatditf)
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define fp128 @conv_LD_LL(i64 %a) {
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entry:
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%conv = sitofp i64 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_UChar:
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; ALL: ld $25, %call16(__floatunsitf)
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define fp128 @conv_LD_UChar(i8 zeroext %a) {
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entry:
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%conv = uitofp i8 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_UShort:
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; ALL: ld $25, %call16(__floatunsitf)
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define fp128 @conv_LD_UShort(i16 zeroext %a) {
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entry:
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%conv = uitofp i16 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_UInt:
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; ALL: ld $25, %call16(__floatunsitf)
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define fp128 @conv_LD_UInt(i32 signext %a) {
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entry:
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%conv = uitofp i32 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_ULL:
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; ALL: ld $25, %call16(__floatunditf)
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define fp128 @conv_LD_ULL(i64 %a) {
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entry:
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%conv = uitofp i64 %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_char_LD:
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; ALL: ld $25, %call16(__fixtfsi)
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define signext i8 @conv_char_LD(fp128 %a) {
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entry:
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%conv = fptosi fp128 %a to i8
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ret i8 %conv
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}
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; ALL-LABEL: conv_short_LD:
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; ALL: ld $25, %call16(__fixtfsi)
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define signext i16 @conv_short_LD(fp128 %a) {
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entry:
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%conv = fptosi fp128 %a to i16
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ret i16 %conv
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}
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; ALL-LABEL: conv_int_LD:
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; ALL: ld $25, %call16(__fixtfsi)
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define i32 @conv_int_LD(fp128 %a) {
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entry:
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%conv = fptosi fp128 %a to i32
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ret i32 %conv
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}
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; ALL-LABEL: conv_LL_LD:
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; ALL: ld $25, %call16(__fixtfdi)
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define i64 @conv_LL_LD(fp128 %a) {
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entry:
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%conv = fptosi fp128 %a to i64
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ret i64 %conv
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}
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; ALL-LABEL: conv_UChar_LD:
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; ALL: ld $25, %call16(__fixtfsi)
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define zeroext i8 @conv_UChar_LD(fp128 %a) {
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entry:
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%conv = fptoui fp128 %a to i8
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ret i8 %conv
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}
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; ALL-LABEL: conv_UShort_LD:
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; ALL: ld $25, %call16(__fixtfsi)
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define zeroext i16 @conv_UShort_LD(fp128 %a) {
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entry:
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%conv = fptoui fp128 %a to i16
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ret i16 %conv
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}
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; ALL-LABEL: conv_UInt_LD:
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; ALL: ld $25, %call16(__fixunstfsi)
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define i32 @conv_UInt_LD(fp128 %a) {
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entry:
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%conv = fptoui fp128 %a to i32
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ret i32 %conv
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}
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; ALL-LABEL: conv_ULL_LD:
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; ALL: ld $25, %call16(__fixunstfdi)
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define i64 @conv_ULL_LD(fp128 %a) {
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entry:
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%conv = fptoui fp128 %a to i64
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ret i64 %conv
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}
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; ALL-LABEL: conv_LD_float:
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; ALL: ld $25, %call16(__extendsftf2)
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define fp128 @conv_LD_float(float %a) {
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entry:
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%conv = fpext float %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_LD_double:
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; ALL: ld $25, %call16(__extenddftf2)
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define fp128 @conv_LD_double(double %a) {
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entry:
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%conv = fpext double %a to fp128
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ret fp128 %conv
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}
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; ALL-LABEL: conv_float_LD:
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; ALL: ld $25, %call16(__trunctfsf2)
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define float @conv_float_LD(fp128 %a) {
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entry:
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%conv = fptrunc fp128 %a to float
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ret float %conv
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}
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; ALL-LABEL: conv_double_LD:
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; ALL: ld $25, %call16(__trunctfdf2)
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define double @conv_double_LD(fp128 %a) {
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entry:
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%conv = fptrunc fp128 %a to double
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ret double %conv
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}
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; ALL-LABEL: libcall1_fabsl:
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; NOT-R2R6-DAG: ld $[[R0:[0-9]+]], 8($[[R4:[0-9]+]])
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; NOT-R2R6-DAG: daddiu $[[R1:[0-9]+]], $zero, 1
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; NOT-R2R6-DAG: dsll $[[R2:[0-9]+]], $[[R1]], 63
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; NOT-R2R6-DAG: daddiu $[[R3:[0-9]+]], $[[R2]], -1
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; NOT-R2R6-DAG: and $4, $[[R0]], $[[R3]]
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; NOT-R2R6-DAG: ld $2, 0($[[R4]])
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; R2R6-DAG: ld $[[R0:[0-9]+]], 0($[[R3:[0-9]+]])
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; R2R6-DAG: ld $[[R1:[0-9]+]], 8($[[R3]])
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; R2R6-DAG: dextm $[[R2:[0-9]+]], $[[R1]], 0, 63
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define fp128 @libcall1_fabsl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @fabsl(fp128 %0) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @fabsl(fp128) #1
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; ALL-LABEL: libcall1_ceill:
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; ALL: ld $25, %call16(ceill)
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define fp128 @libcall1_ceill() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @ceill(fp128 %0) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @ceill(fp128) #1
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; ALL-LABEL: libcall1_sinl:
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; ALL: ld $25, %call16(sinl)
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define fp128 @libcall1_sinl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @sinl(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @sinl(fp128) #2
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; ALL-LABEL: libcall1_cosl:
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; ALL: ld $25, %call16(cosl)
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define fp128 @libcall1_cosl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @cosl(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @cosl(fp128) #2
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; ALL-LABEL: libcall1_expl:
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; ALL: ld $25, %call16(expl)
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define fp128 @libcall1_expl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @expl(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @expl(fp128) #2
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; ALL-LABEL: libcall1_exp2l:
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; ALL: ld $25, %call16(exp2l)
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define fp128 @libcall1_exp2l() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @exp2l(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @exp2l(fp128) #2
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; ALL-LABEL: libcall1_logl:
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; ALL: ld $25, %call16(logl)
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define fp128 @libcall1_logl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @logl(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @logl(fp128) #2
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; ALL-LABEL: libcall1_log2l:
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; ALL: ld $25, %call16(log2l)
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define fp128 @libcall1_log2l() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @log2l(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @log2l(fp128) #2
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; ALL-LABEL: libcall1_log10l:
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; ALL: ld $25, %call16(log10l)
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define fp128 @libcall1_log10l() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @log10l(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @log10l(fp128) #2
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; ALL-LABEL: libcall1_nearbyintl:
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; ALL: ld $25, %call16(nearbyintl)
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define fp128 @libcall1_nearbyintl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @nearbyintl(fp128 %0) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @nearbyintl(fp128) #1
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; ALL-LABEL: libcall1_floorl:
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; ALL: ld $25, %call16(floorl)
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define fp128 @libcall1_floorl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @floorl(fp128 %0) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @floorl(fp128) #1
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; ALL-LABEL: libcall1_sqrtl:
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; ALL: ld $25, %call16(sqrtl)
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define fp128 @libcall1_sqrtl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @sqrtl(fp128 %0) nounwind
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ret fp128 %call
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}
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declare fp128 @sqrtl(fp128) #2
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; ALL-LABEL: libcall1_rintl:
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; ALL: ld $25, %call16(rintl)
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define fp128 @libcall1_rintl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%call = tail call fp128 @rintl(fp128 %0) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @rintl(fp128) #1
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; ALL-LABEL: libcall_powil:
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; ALL: ld $25, %call16(__powitf2)
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define fp128 @libcall_powil(fp128 %a, i32 %b) {
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entry:
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%0 = tail call fp128 @llvm.powi.f128(fp128 %a, i32 %b)
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ret fp128 %0
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}
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declare fp128 @llvm.powi.f128(fp128, i32) #3
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; ALL-LABEL: libcall2_copysignl:
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; NOT-R2R6-DAG: daddiu $[[R2:[0-9]+]], $zero, 1
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; NOT-R2R6-DAG: dsll $[[R3:[0-9]+]], $[[R2]], 63
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; ALL-DAG: ld $[[R0:[0-9]+]], %got_disp(gld1)
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; ALL-DAG: ld $[[R1:[0-9]+]], 8($[[R0]])
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; NOT-R2R6-DAG: and $[[R4:[0-9]+]], $[[R1]], $[[R3]]
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; ALL-DAG: ld $[[R5:[0-9]+]], %got_disp(gld0)
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; ALL-DAG: ld $[[R6:[0-9]+]], 8($[[R5]])
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; R2R6: dinsu $[[R0:[0-9]+]], $[[R1:[0-9]+]], 63, 1
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; NOT-R2R6-DAG: daddiu $[[R7:[0-9]+]], $[[R3]], -1
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; NOT-R2R6-DAG: and $[[R8:[0-9]+]], $[[R6]], $[[R7]]
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; NOT-R2R6-DAG: or $4, $[[R8]], $[[R4]]
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; ALL-DAG: ld $2, 0($[[R5]])
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define fp128 @libcall2_copysignl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%call = tail call fp128 @copysignl(fp128 %0, fp128 %1) nounwind readnone
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ret fp128 %call
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}
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declare fp128 @copysignl(fp128, fp128) #1
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; ALL-LABEL: libcall2_powl:
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; ALL: ld $25, %call16(powl)
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define fp128 @libcall2_powl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%call = tail call fp128 @powl(fp128 %0, fp128 %1) nounwind
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ret fp128 %call
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}
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declare fp128 @powl(fp128, fp128) #2
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; ALL-LABEL: libcall2_fmodl:
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; ALL: ld $25, %call16(fmodl)
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define fp128 @libcall2_fmodl() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld1, align 16
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%call = tail call fp128 @fmodl(fp128 %0, fp128 %1) nounwind
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ret fp128 %call
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}
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declare fp128 @fmodl(fp128, fp128) #2
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; ALL-LABEL: libcall3_fmal:
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; ALL: ld $25, %call16(fmal)
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define fp128 @libcall3_fmal() {
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entry:
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%0 = load fp128, fp128* @gld0, align 16
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%1 = load fp128, fp128* @gld2, align 16
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%2 = load fp128, fp128* @gld1, align 16
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%3 = tail call fp128 @llvm.fma.f128(fp128 %0, fp128 %2, fp128 %1)
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ret fp128 %3
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}
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declare fp128 @llvm.fma.f128(fp128, fp128, fp128) #4
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; ALL-LABEL: cmp_lt:
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; ALL: ld $25, %call16(__lttf2)
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define i32 @cmp_lt(fp128 %a, fp128 %b) {
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entry:
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%cmp = fcmp olt fp128 %a, %b
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%conv = zext i1 %cmp to i32
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|
ret i32 %conv
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}
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; ALL-LABEL: cmp_le:
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; ALL: ld $25, %call16(__letf2)
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|
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define i32 @cmp_le(fp128 %a, fp128 %b) {
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entry:
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|
%cmp = fcmp ole fp128 %a, %b
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%conv = zext i1 %cmp to i32
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|
ret i32 %conv
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|
}
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|
|
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; ALL-LABEL: cmp_gt:
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; ALL: ld $25, %call16(__gttf2)
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|
|
|
define i32 @cmp_gt(fp128 %a, fp128 %b) {
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|
entry:
|
|
%cmp = fcmp ogt fp128 %a, %b
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|
%conv = zext i1 %cmp to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
; ALL-LABEL: cmp_ge:
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|
; ALL: ld $25, %call16(__getf2)
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|
|
|
define i32 @cmp_ge(fp128 %a, fp128 %b) {
|
|
entry:
|
|
%cmp = fcmp oge fp128 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
; ALL-LABEL: cmp_eq:
|
|
; ALL: ld $25, %call16(__eqtf2)
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|
|
|
define i32 @cmp_eq(fp128 %a, fp128 %b) {
|
|
entry:
|
|
%cmp = fcmp oeq fp128 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
; ALL-LABEL: cmp_ne:
|
|
; ALL: ld $25, %call16(__netf2)
|
|
|
|
define i32 @cmp_ne(fp128 %a, fp128 %b) {
|
|
entry:
|
|
%cmp = fcmp une fp128 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
; ALL-LABEL: load_LD_LD:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gld1)
|
|
; ALL: ld $2, 0($[[R0]])
|
|
; ALL: ld $4, 8($[[R0]])
|
|
|
|
define fp128 @load_LD_LD() {
|
|
entry:
|
|
%0 = load fp128, fp128* @gld1, align 16
|
|
ret fp128 %0
|
|
}
|
|
|
|
; ALL-LABEL: load_LD_float:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gf1)
|
|
; ALL: lw $4, 0($[[R0]])
|
|
; ALL: ld $25, %call16(__extendsftf2)
|
|
; PRER6: jalr $25
|
|
; R6: jalrc $25
|
|
|
|
define fp128 @load_LD_float() {
|
|
entry:
|
|
%0 = load float, float* @gf1, align 4
|
|
%conv = fpext float %0 to fp128
|
|
ret fp128 %conv
|
|
}
|
|
|
|
; ALL-LABEL: load_LD_double:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gd1)
|
|
; ALL: ld $4, 0($[[R0]])
|
|
; ALL: ld $25, %call16(__extenddftf2)
|
|
; PRER6: jalr $25
|
|
; R6: jalrc $25
|
|
|
|
define fp128 @load_LD_double() {
|
|
entry:
|
|
%0 = load double, double* @gd1, align 8
|
|
%conv = fpext double %0 to fp128
|
|
ret fp128 %conv
|
|
}
|
|
|
|
; ALL-LABEL: store_LD_LD:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gld1)
|
|
; ALL: ld $[[R2:[0-9]+]], 8($[[R0]])
|
|
; ALL: ld $[[R3:[0-9]+]], %got_disp(gld0)
|
|
; ALL: sd $[[R2]], 8($[[R3]])
|
|
; ALL: ld $[[R1:[0-9]+]], 0($[[R0]])
|
|
; ALL: sd $[[R1]], 0($[[R3]])
|
|
|
|
define void @store_LD_LD() {
|
|
entry:
|
|
%0 = load fp128, fp128* @gld1, align 16
|
|
store fp128 %0, fp128* @gld0, align 16
|
|
ret void
|
|
}
|
|
|
|
; ALL-LABEL: store_LD_float:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gld1)
|
|
; ALL: ld $4, 0($[[R0]])
|
|
; ALL: ld $5, 8($[[R0]])
|
|
; ALL: ld $25, %call16(__trunctfsf2)
|
|
; PRER6: jalr $25
|
|
; R6: jalrc $25
|
|
; ALL: ld $[[R1:[0-9]+]], %got_disp(gf1)
|
|
; ALL: sw $2, 0($[[R1]])
|
|
|
|
define void @store_LD_float() {
|
|
entry:
|
|
%0 = load fp128, fp128* @gld1, align 16
|
|
%conv = fptrunc fp128 %0 to float
|
|
store float %conv, float* @gf1, align 4
|
|
ret void
|
|
}
|
|
|
|
; ALL-LABEL: store_LD_double:
|
|
; ALL: ld $[[R0:[0-9]+]], %got_disp(gld1)
|
|
; ALL: ld $4, 0($[[R0]])
|
|
; ALL: ld $5, 8($[[R0]])
|
|
; ALL: ld $25, %call16(__trunctfdf2)
|
|
; PRER6: jalr $25
|
|
; R6: jalrc $25
|
|
; ALL: ld $[[R1:[0-9]+]], %got_disp(gd1)
|
|
; ALL: sd $2, 0($[[R1]])
|
|
|
|
define void @store_LD_double() {
|
|
entry:
|
|
%0 = load fp128, fp128* @gld1, align 16
|
|
%conv = fptrunc fp128 %0 to double
|
|
store double %conv, double* @gd1, align 8
|
|
ret void
|
|
}
|
|
|
|
; ALL-LABEL: select_LD:
|
|
; C_CC_FMT: movn $8, $6, $4
|
|
; C_CC_FMT: movn $9, $7, $4
|
|
; C_CC_FMT: move $2, $8
|
|
; C_CC_FMT: move $4, $9
|
|
|
|
; FIXME: This sll works around an implementation detail in the code generator
|
|
; (setcc's result is i32 so bits 32-63 are undefined). It's not really
|
|
; needed.
|
|
; CMP_CC_FMT-DAG: sll $[[CC:[0-9]+]], $4, 0
|
|
; CMP_CC_FMT-DAG: seleqz $[[EQ1:[0-9]+]], $8, $[[CC]]
|
|
; CMP_CC_FMT-DAG: selnez $[[NE1:[0-9]+]], $6, $[[CC]]
|
|
; CMP_CC_FMT-DAG: or $2, $[[NE1]], $[[EQ1]]
|
|
; CMP_CC_FMT-DAG: seleqz $[[EQ2:[0-9]+]], $9, $[[CC]]
|
|
; CMP_CC_FMT-DAG: selnez $[[NE2:[0-9]+]], $7, $[[CC]]
|
|
; CMP_CC_FMT-DAG: or $4, $[[NE2]], $[[EQ2]]
|
|
|
|
define fp128 @select_LD(i32 signext %a, i64, fp128 %b, fp128 %c) {
|
|
entry:
|
|
%tobool = icmp ne i32 %a, 0
|
|
%cond = select i1 %tobool, fp128 %b, fp128 %c
|
|
ret fp128 %cond
|
|
}
|
|
|
|
; ALL-LABEL: selectCC_LD:
|
|
; ALL: move $[[R0:[0-9]+]], $11
|
|
; ALL: move $[[R1:[0-9]+]], $10
|
|
; ALL: move $[[R2:[0-9]+]], $9
|
|
; ALL: move $[[R3:[0-9]+]], $8
|
|
; ALL: ld $25, %call16(__gttf2)($gp)
|
|
; PRER6: jalr $25
|
|
; R6: jalrc $25
|
|
|
|
; C_CC_FMT: slti $[[CC:[0-9]+]], $2, 1
|
|
; C_CC_FMT: movz $[[R1]], $[[R3]], $[[CC]]
|
|
; C_CC_FMT: movz $[[R0]], $[[R2]], $[[CC]]
|
|
; C_CC_FMT: move $2, $[[R1]]
|
|
; C_CC_FMT: move $4, $[[R0]]
|
|
|
|
; CMP_CC_FMT: slt $[[CC:[0-9]+]], $zero, $2
|
|
; CMP_CC_FMT: seleqz $[[EQ1:[0-9]+]], $[[R1]], $[[CC]]
|
|
; CMP_CC_FMT: selnez $[[NE1:[0-9]+]], $[[R3]], $[[CC]]
|
|
; CMP_CC_FMT: or $2, $[[NE1]], $[[EQ1]]
|
|
; CMP_CC_FMT: seleqz $[[EQ2:[0-9]+]], $[[R0]], $[[CC]]
|
|
; CMP_CC_FMT: selnez $[[NE2:[0-9]+]], $[[R2]], $[[CC]]
|
|
; CMP_CC_FMT: or $4, $[[NE2]], $[[EQ2]]
|
|
|
|
define fp128 @selectCC_LD(fp128 %a, fp128 %b, fp128 %c, fp128 %d) {
|
|
entry:
|
|
%cmp = fcmp ogt fp128 %a, %b
|
|
%cond = select i1 %cmp, fp128 %c, fp128 %d
|
|
ret fp128 %cond
|
|
}
|