mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
7d64810efd
The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514
32 lines
781 B
LLVM
32 lines
781 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabihf %s -o - | FileCheck %s
|
|
|
|
; Check that new water is created by splitting the basic block after the
|
|
; load instruction. Previously, new water was created before the load
|
|
; instruction, which caused the pass to fail to converge.
|
|
|
|
define void @test(i1 %tst) {
|
|
; CHECK-LABEL: test:
|
|
; CHECK: vldr {{s[0-9]+}}, [[CONST:\.LCPI[0-9]+_[0-9]+]]
|
|
|
|
; CHECK: b.w [[CONTINUE:\.LBB[0-9]+_[0-9]+]]
|
|
; CHECK: [[CONST]]:
|
|
; CHECK-NEXT: .long
|
|
|
|
; CHECK: [[CONTINUE]]:
|
|
|
|
entry:
|
|
br i1 %tst, label %true, label %false
|
|
|
|
true:
|
|
%val = phi float [12345.0, %entry], [undef, %false]
|
|
call i32 @llvm.arm.space(i32 2000, i32 undef)
|
|
call void @bar(float %val)
|
|
ret void
|
|
|
|
false:
|
|
br label %true
|
|
}
|
|
|
|
declare void @bar(float)
|
|
declare i32 @llvm.arm.space(i32, i32)
|