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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
39 lines
964 B
YAML
39 lines
964 B
YAML
# RUN: llc -march=x86-64 %s -o - -run-pass=processimpdefs -run-pass=unreachable-mbb-elimination | FileCheck %s
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---
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name: f
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr32, preferred-register: '' }
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- { id: 1, class: gr32, preferred-register: '' }
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- { id: 2, class: gr32, preferred-register: '' }
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body: |
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bb.0:
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%0 = IMPLICIT_DEF
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JMP_1 %bb.1
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bb.1:
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%1 = PHI %0, %bb.0, %2, %bb.2
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%2 = ADD32ri8 killed %1, 1, implicit-def $eflags
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JMP_1 %bb.3
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bb.2:
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JMP_1 %bb.1
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bb.3:
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...
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# bb2 above is dead and should be removed and the PHI should be replaced with a
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# COPY from an undef value since the bb0 value in the PHI is undef.
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# CHECK: bb.0:
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# CHECK: successors: %bb.1
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# CHECK: JMP_1 %bb.1
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# CHECK: bb.1:
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# CHECK: successors: %bb.2
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# CHECK: [[TMP1:%[0-9]+]]:gr32 = COPY undef %{{[0-9]+}}
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# CHECK: %{{[0-9]+}}:gr32 = ADD32ri8 killed [[TMP1]], 1
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# CHECK: JMP_1 %bb.2
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# CHECK: bb.2:
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