Simon Dardis 9ee645c860 [mips] Match 'ins' and its' variants with C++ code ... Change the ISel matching of 'ins', 'dins[mu]' from tablegen code to C++ code. This resolves an issue where ISel would select 'dins' instead of 'dinsm' when the instructions size and position were individually in range but their sum was out of range according to the ISA specification. Reviewers: atanasyan Differential Revision: https://reviews.llvm.org/D39117 llvm-svn: 317331		2017-11-03 15:35:13 +00:00
..
AsmParser	[Asm] Add debug tracing in table-generated assembly matcher	2017-10-11 09:17:43 +00:00
Disassembler	[mips] Place certain 64 bit FPU instructions in their own decoder namespace	2017-10-05 10:27:37 +00:00
InstPrinter
MCTargetDesc	Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"	2017-10-12 22:57:28 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
MicroMips32r6InstrFormats.td
MicroMips32r6InstrInfo.td	[mips] Place certain 64 bit FPU instructions in their own decoder namespace	2017-10-05 10:27:37 +00:00
MicroMips64r6InstrFormats.td
MicroMips64r6InstrInfo.td	[mips] Match 'ins' and its' variants with C++ code	2017-11-03 15:35:13 +00:00
MicroMipsDSPInstrFormats.td
MicroMipsDSPInstrInfo.td	[mips] Enable spilling and reloading of the dsp register set.	2017-10-03 13:45:49 +00:00
MicroMipsInstrFormats.td	[mips][micromips] Fix (dis)assembly of bc1(t|f)	2017-10-16 14:20:22 +00:00
MicroMipsInstrFPU.td	[mips] Fix (dis)assembly of abs.fmt for micromips	2017-10-26 11:36:54 +00:00
MicroMipsInstrInfo.td	[mips] Match 'ins' and its' variants with C++ code	2017-11-03 15:35:13 +00:00
MicroMipsSizeReduction.cpp
Mips16FrameLowering.cpp	Remove unused variables	2017-10-15 05:35:02 +00:00
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp
Mips16ISelLowering.h
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips32r6InstrFormats.td
Mips32r6InstrInfo.td
Mips64InstrInfo.td	[mips] Match 'ins' and its' variants with C++ code	2017-11-03 15:35:13 +00:00
Mips64r6InstrInfo.td
Mips.h
Mips.td
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	[MC] Adding code padding for performance stability - infrastructure. NFC.	2017-10-24 06:16:03 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCCState.cpp
MipsCCState.h
MipsCondMov.td	[mips] Place certain 64 bit FPU instructions in their own decoder namespace	2017-10-05 10:27:37 +00:00
MipsConstantIslandPass.cpp	Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people.	2017-10-15 14:32:27 +00:00
MipsDelaySlotFiller.cpp
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td	[mips] Enable spilling and reloading of the dsp register set.	2017-10-03 13:45:49 +00:00
MipsEVAInstrFormats.td
MipsEVAInstrInfo.td
MipsFastISel.cpp
MipsFrameLowering.cpp	[mips] Use register scavenging with MSA.	2017-11-02 12:47:22 +00:00
MipsFrameLowering.h
MipsHazardSchedule.cpp
MipsInstrFormats.td
MipsInstrFPU.td	[mips] Fix (dis)assembly of abs.fmt for micromips	2017-10-26 11:36:54 +00:00
MipsInstrInfo.cpp	[mips] Fix PR35071	2017-10-26 10:58:36 +00:00
MipsInstrInfo.h	[mips] Add support for parsing target specific flags for MIR	2017-10-11 11:11:35 +00:00
MipsInstrInfo.td	[mips] Match 'ins' and its' variants with C++ code	2017-11-03 15:35:13 +00:00
MipsISelDAGToDAG.cpp
MipsISelDAGToDAG.h
MipsISelLowering.cpp	Revert "[mips] Reordering callseq* nodes to be linear"	2017-10-20 14:35:41 +00:00
MipsISelLowering.h	Revert "[mips] Reordering callseq* nodes to be linear"	2017-10-20 14:35:41 +00:00
MipsLongBranch.cpp
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsMSAInstrFormats.td
MipsMSAInstrInfo.td
MipsMTInstrFormats.td
MipsMTInstrInfo.td
MipsOptimizePICCall.cpp
MipsOptionRecord.h
MipsOs16.cpp
MipsRegisterInfo.cpp	[mips] Clean up some whitespace (NFC).	2017-10-25 13:35:53 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td
MipsSchedule.td
MipsScheduleGeneric.td
MipsScheduleP5600.td
MipsSEFrameLowering.cpp	[mips] Use register scavenging with MSA.	2017-11-02 12:47:22 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips] Enable spilling and reloading of the dsp register set.	2017-10-03 13:45:49 +00:00
MipsSEInstrInfo.h
MipsSEISelDAGToDAG.cpp	[mips] Match 'ins' and its' variants with C++ code	2017-11-03 15:35:13 +00:00
MipsSEISelDAGToDAG.h
MipsSEISelLowering.cpp
MipsSEISelLowering.h
MipsSERegisterInfo.cpp
MipsSERegisterInfo.h
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp	Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"	2017-10-12 22:57:28 +00:00
MipsTargetMachine.h	Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"	2017-10-12 22:57:28 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h	[mips] implement .set dspr2 directive	2017-10-05 17:40:32 +00:00
MSA.txt
Relocation.txt