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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
38 lines
1.2 KiB
LLVM
38 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define i1 @foo(i64 %a) {
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fucompp
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; X86-NEXT: fnstsw %ax
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; X86-NEXT: # kill: def $ah killed $ah killed $ax
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; X86-NEXT: sahf
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; X86-NEXT: setp %al
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; X86-NEXT: retl
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;
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; X86-SSE-LABEL: foo:
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; X86-SSE: # %bb.0:
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; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-SSE-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
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; X86-SSE-NEXT: setp %al
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: foo:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %xmm0
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
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; X64-NEXT: ucomiss %xmm1, %xmm0
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; X64-NEXT: setp %al
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; X64-NEXT: retq
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%t = bitcast i64 %a to <2 x float>
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%r = extractelement <2 x float> %t, i32 0
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%s = extractelement <2 x float> %t, i32 1
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%b = fcmp uno float %r, %s
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ret i1 %b
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}
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