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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
llvm-mirror/test/CodeGen
Tim Northover 9ef696c849 ARM: don't try to over-align large vectors as arguments.
By default LLVM thinks very large vectors get aligned to their size when
passed across functions. Unfortunately no-one told the ARM backend so it
doesn't trigger stack realignment and so accesses can cause the usual
misalignment issues (e.g. a data abort).

This changes the ABI alignment to the stack alignment, which in practice
(and as a bonus) also coincides with the alignment "natural" vectors get.

llvm-svn: 331451
2018-05-03 12:54:25 +00:00
..
AArch64 Rename invariant.group.barrier to launder.invariant.group 2018-05-03 11:03:01 +00:00
AMDGPU Rename invariant.group.barrier to launder.invariant.group 2018-05-03 11:03:01 +00:00
ARC
ARM ARM: don't try to over-align large vectors as arguments. 2018-05-03 12:54:25 +00:00
AVR
BPF
Generic Rename invariant.group.barrier to launder.invariant.group 2018-05-03 11:03:01 +00:00
Hexagon [LivePhysRegs] Remove registers clobbered by regmasks from the live set 2018-04-30 19:38:47 +00:00
Inputs
Lanai
Mips Reland r331175: "[mips] Fix the predicates of jump and branch and link instructions" 2018-05-01 13:06:49 +00:00
MIR MachineInst support mapping SDNode fast math flags for support in Back End code generation 2018-05-03 00:07:56 +00:00
MSP430
Nios2
NVPTX [NVPTX] Make the legalizer expand shufflevector of <2 x half> 2018-04-26 15:26:29 +00:00
PowerPC [PowerPC] Implement isMaskAndCmp0FoldingBeneficial 2018-05-02 23:55:23 +00:00
RISCV [RISCV] Add remat.ll test case 2018-04-27 11:50:30 +00:00
SPARC [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
SystemZ [SystemZ] Handle SADDO et.al. and ADD/SUBCARRY 2018-04-30 17:54:28 +00:00
Thumb
Thumb2
WebAssembly [DAGCombiner] Fix a case of 1 in non-splat vector pow2 divisor 2018-04-27 22:23:11 +00:00
WinCFGuard
WinEH
X86 [X86] Split WriteVecIMul/WriteVecPMULLD/WriteMPSAD/WritePSADBW into XMM and YMM/ZMM scheduler classes 2018-05-03 10:31:20 +00:00
XCore