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llvm-mirror/test/CodeGen
Hans Wennborg 9fe6bf47fd X86: Use push-pop for materializing 8-bit immediates for minsize (take 2)
This is the same as r255936, with added logic for avoiding clobbering of the
red zone (PR26023).

Differential Revision: http://reviews.llvm.org/D18246

llvm-svn: 264375
2016-03-25 01:10:56 +00:00
..
AArch64 [CXX_FAST_TLS] Disable tail call when calling conventions are mismatched. 2016-03-18 23:41:51 +00:00
AMDGPU LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos 2016-03-24 21:41:38 +00:00
ARM ARM: fix optimised division on WoA 2016-03-25 00:34:11 +00:00
BPF BPF: emit an error message for unsupported signed division operation 2016-03-18 22:02:47 +00:00
CPP
Generic
Hexagon [Hexagon] Add support for run-time stack overflow checking 2016-03-24 20:20:07 +00:00
Inputs
Mips CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS. 2016-03-24 15:38:38 +00:00
MIR [MIR] Add a test case for the diagnostic of a wrongly typed generic instruction 2016-03-15 18:31:29 +00:00
MSP430
NVPTX [NVPTX] Adds a new address space inference pass. 2016-03-20 20:59:20 +00:00
PowerPC Finish the incomplete 'd' inline asm constraint support for PPC by 2016-03-24 21:04:52 +00:00
SPARC
SystemZ [SystemZ] Avoid LER on z13 due to partial register dependencies 2016-03-14 13:50:03 +00:00
Thumb
Thumb2 ARM: Introduce conservative load/store optimization mode 2016-03-02 19:20:00 +00:00
WebAssembly [WebAssembly] Implement the rotate instructions. 2016-03-22 18:01:49 +00:00
WinEH
X86 X86: Use push-pop for materializing 8-bit immediates for minsize (take 2) 2016-03-25 01:10:56 +00:00
XCore