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210c7054ac
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: sub r2, r2, #6 sub r2, #6 rdar://9682597 llvm-svn: 133925
127 lines
4.3 KiB
ArmAsm
127 lines
4.3 KiB
ArmAsm
@ RUN: llvm-mc -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
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foo:
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@ CHECK: foo
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sub r2, r2, #6
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sub r2, #6
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sub r2, r2, r3
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sub r2, r3
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@ CHECK: sub r2, r2, #6 @ encoding: [0x06,0x20,0x42,0xe2]
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@ CHECK: sub r2, r2, #6 @ encoding: [0x06,0x20,0x42,0xe2]
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@ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
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@ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
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add r2, r2, #6
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add r2, #6
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add r2, r2, r3
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add r2, r3
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@ CHECK: add r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe2]
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@ CHECK: add r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe2]
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@ CHECK: add r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe0]
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@ CHECK: add r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe0]
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and r2, r2, #6
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and r2, #6
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and r2, r2, r3
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and r2, r3
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@ CHECK: and r2, r2, #6 @ encoding: [0x06,0x20,0x02,0xe2]
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@ CHECK: and r2, r2, #6 @ encoding: [0x06,0x20,0x02,0xe2]
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@ CHECK: and r2, r2, r3 @ encoding: [0x03,0x20,0x02,0xe0]
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@ CHECK: and r2, r2, r3 @ encoding: [0x03,0x20,0x02,0xe0]
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orr r2, r2, #6
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orr r2, #6
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orr r2, r2, r3
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orr r2, r3
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@ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
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@ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
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@ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
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@ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
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eor r2, r2, #6
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eor r2, #6
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eor r2, r2, r3
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eor r2, r3
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@ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
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@ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
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@ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
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@ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
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bic r2, r2, #6
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bic r2, #6
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bic r2, r2, r3
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bic r2, r3
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@ CHECK: bic r2, r2, #6 @ encoding: [0x06,0x20,0xc2,0xe3]
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@ CHECK: bic r2, r2, #6 @ encoding: [0x06,0x20,0xc2,0xe3]
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@ CHECK: bic r2, r2, r3 @ encoding: [0x03,0x20,0xc2,0xe1]
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@ CHECK: bic r2, r2, r3 @ encoding: [0x03,0x20,0xc2,0xe1]
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@ Also check that we handle the predicate and cc_out operands.
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subseq r2, r2, #6
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subseq r2, #6
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subseq r2, r2, r3
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subseq r2, r3
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@ CHECK: subseq r2, r2, #6 @ encoding: [0x06,0x20,0x52,0x02]
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@ CHECK: subseq r2, r2, #6 @ encoding: [0x06,0x20,0x52,0x02]
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@ CHECK: subseq r2, r2, r3 @ encoding: [0x03,0x20,0x52,0x00]
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@ CHECK: subseq r2, r2, r3 @ encoding: [0x03,0x20,0x52,0x00]
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addseq r2, r2, #6
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addseq r2, #6
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addseq r2, r2, r3
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addseq r2, r3
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@ CHECK: addseq r2, r2, #6 @ encoding: [0x06,0x20,0x92,0x02]
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@ CHECK: addseq r2, r2, #6 @ encoding: [0x06,0x20,0x92,0x02]
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@ CHECK: addseq r2, r2, r3 @ encoding: [0x03,0x20,0x92,0x00]
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@ CHECK: addseq r2, r2, r3 @ encoding: [0x03,0x20,0x92,0x00]
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andseq r2, r2, #6
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andseq r2, #6
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andseq r2, r2, r3
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andseq r2, r3
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@ CHECK: andseq r2, r2, #6 @ encoding: [0x06,0x20,0x12,0x02]
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@ CHECK: andseq r2, r2, #6 @ encoding: [0x06,0x20,0x12,0x02]
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@ CHECK: andseq r2, r2, r3 @ encoding: [0x03,0x20,0x12,0x00]
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@ CHECK: andseq r2, r2, r3 @ encoding: [0x03,0x20,0x12,0x00]
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orrseq r2, r2, #6
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orrseq r2, #6
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orrseq r2, r2, r3
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orrseq r2, r3
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@ CHECK: orrseq r2, r2, #6 @ encoding: [0x06,0x20,0x92,0x03]
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@ CHECK: orrseq r2, r2, #6 @ encoding: [0x06,0x20,0x92,0x03]
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@ CHECK: orrseq r2, r2, r3 @ encoding: [0x03,0x20,0x92,0x01]
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@ CHECK: orrseq r2, r2, r3 @ encoding: [0x03,0x20,0x92,0x01]
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eorseq r2, r2, #6
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eorseq r2, #6
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eorseq r2, r2, r3
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eorseq r2, r3
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@ CHECK: eorseq r2, r2, #6 @ encoding: [0x06,0x20,0x32,0x02]
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@ CHECK: eorseq r2, r2, #6 @ encoding: [0x06,0x20,0x32,0x02]
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@ CHECK: eorseq r2, r2, r3 @ encoding: [0x03,0x20,0x32,0x00]
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@ CHECK: eorseq r2, r2, r3 @ encoding: [0x03,0x20,0x32,0x00]
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bicseq r2, r2, #6
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bicseq r2, #6
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bicseq r2, r2, r3
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bicseq r2, r3
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@ CHECK: bicseq r2, r2, #6 @ encoding: [0x06,0x20,0xd2,0x03]
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@ CHECK: bicseq r2, r2, #6 @ encoding: [0x06,0x20,0xd2,0x03]
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@ CHECK: bicseq r2, r2, r3 @ encoding: [0x03,0x20,0xd2,0x01]
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@ CHECK: bicseq r2, r2, r3 @ encoding: [0x03,0x20,0xd2,0x01]
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