James Molloy a4b2ec478f Fix the Load/Store optimization pass to work with Thumb1. ... Patch by Moritz Roth! llvm-svn: 208992		2014-05-16 14:14:30 +00:00
..
AArch64	Revert "Implement global merge optimization for global variables."	2014-05-16 13:02:18 +00:00
ARM	Revert "Implement global merge optimization for global variables."	2014-05-16 13:02:18 +00:00
ARM64	Revert "Implement global merge optimization for global variables."	2014-05-16 13:02:18 +00:00
CPP
Generic	MC: move test from Generic to COFF	2014-04-23 21:41:07 +00:00
Hexagon	DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.	2014-05-14 21:52:46 +00:00
Inputs
Mips	Finish materialize for ints	2014-05-15 21:54:15 +00:00
MSP430	Mark FPB as a reserved register when needed.	2014-04-02 13:13:56 +00:00
NVPTX	Fix the test: DCE optimized away everything.	2014-04-21 17:23:12 +00:00
PowerPC	DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.	2014-05-14 21:52:46 +00:00
R600	R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0	2014-05-15 14:41:54 +00:00
SPARC	TableGen: fix operand counting for aliases	2014-05-16 09:42:04 +00:00
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Fix the Load/Store optimization pass to work with Thumb1.	2014-05-16 14:14:30 +00:00
Thumb2	Fix the Load/Store optimization pass to work with Thumb1.	2014-05-16 14:14:30 +00:00
X86	llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.	2014-05-15 15:45:31 +00:00
XCore	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00