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llvm-mirror/docs/AMDGPU/gfx10_data_mimg_store_d16.rst
Dmitry Preobrazhensky d2c3f2c3bb [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of GFX10;
- added description of operands sccz, vccz, lds_direct, etc;
- minor bugfixing and improvements.

llvm-svn: 365347
2019-07-08 16:50:11 +00:00

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.. _amdgpu_synid10_data_mimg_store_d16:
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===========================
Image data to store by an *image_store* instruction.
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`d16<amdgpu_synid_d16>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
*Operands:* :ref:`v<amdgpu_synid_v>`