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llvm-mirror/test/CodeGen
Simon Pilgrim 8beb4573f2 [X86][SSE] Add support for X86ISD::PACKSS to ComputeNumSignBitsForTargetNode
Helps improve combineLogicBlendIntoPBLENDV support by allowing us to peek into through PACKSS truncations of vector comparison results.

Differential Revision: https://reviews.llvm.org/D37680

llvm-svn: 312916
2017-09-11 14:03:47 +00:00
..
AArch64 [MachineCombiner] Update instruction depths incrementally for large BBs. 2017-09-07 12:49:39 +00:00
AMDGPU [AMDGPU] exp should not be in WQM mode 2017-09-11 13:55:39 +00:00
ARC
ARM [ARM] Use ADDCARRY / SUBCARRY 2017-09-11 07:38:05 +00:00
AVR [AVR] Enable the '__do_copy_data' function 2017-09-11 10:32:51 +00:00
BPF bpf: fix test failures due to previous bpf change of assembly code syntax 2017-09-09 00:11:13 +00:00
Generic
Hexagon Preserve existing regs when adding pristines to LivePhysRegs/LiveRegUnits 2017-09-08 16:29:50 +00:00
Inputs
Lanai
Mips
MIR AMDGPU: Handle non-temporal loads and stores 2017-09-07 17:14:54 +00:00
MSP430
Nios2
NVPTX [CUDA] Added rudimentary support for CUDA-9 and sm_70. 2017-09-07 18:14:32 +00:00
PowerPC PPC: Don't select lxv/stxv for insufficiently aligned stack slots. 2017-09-09 00:37:56 +00:00
SPARC
SystemZ
Thumb
Thumb2
WebAssembly
WinEH
X86 [X86][SSE] Add support for X86ISD::PACKSS to ComputeNumSignBitsForTargetNode 2017-09-11 14:03:47 +00:00
XCore